Finally, a simple introduction to the SMPS management chip layout and some performance test results.
最后，简单介绍了该开关电源管理芯片的版图设计与部分性能测试结果。
Cells used in the circuit have much similarity, which helps further reduction of chip areas in the layout procedure based on standard cells.
使用的标准单元类型具有较大程度的相似性，有利于基于标准单元布局布线软件进一步减少芯片面积。
The RV790 chip is not pin compatible with RV770 boards, so partners will have to change the layout of the boards to accommodate the new chip.
RV790芯片的引脚兼容不符合RV770板，以便合作伙伴将必须改变的布局板以适应新的芯片。
Lead ASIC frond-end design team to complete Synthesis, STA, Equivelant Check, Post Layout Simulation, DFT, ATE, Power Control. Make sure RTL code is ok for chip implement.
负责带领整个团队实施芯片的综合、静态时序分析、逻辑一致性分析、后仿真、DFT、ATE、功耗控制。从芯片实现的角度对模块的RTL代码和芯片的RTL代码进行把关。
The hardware layout and software development for single chip microprocessor automatic micro-irrigation controller and system programming are presented in detail in this paper.
本论文详细地论述了由单片机为处理器的自动微灌溉控制器的硬件、软件设计、系统编程和抗干扰设计等方面的问题。
The thesis presents basic principle of CRC and rounded circuit design, simulation results, layout design and testing results of a PLL type CRC, which is incorporated in a optic-fiber receiver chip.
本论文给出了时钟恢复电路的基本原理以及采用PLL型时钟恢复电路的完整的电路设计、模拟结果和版图设计，以及将时钟恢复电路集成到光接收机后的测试结果。
A test chip is designed and manufactured in a semiconductor foundry to test the layout dependency of the electroplating process.
本文设计了一款测试芯片并在一家半导体厂加工制造。
Layout design is an important step in chip design flow and the skills for high-speed layout design are described.
版图设计是芯片设计的重要步骤，文中详细介绍了高速芯片版图设计的注意点和设计技巧。
The hardware includes chip selection, schematic design, PCB layout, plate made, welding, hardware debug and test and so on.
硬件部分包括芯片选型、原理图设计、PC B布板制版焊接、硬件调试与测试等。
This paper design an audio processor through circuit designing, simulation, layout designing, chip testing. PMS1345 is an I2C bus controlled audio processing IC chip.
这次毕业设计从电路设计、性能仿真、版图设计、芯片整合测试这几个方面出发，设计出一款的音频处理芯片pms1345。
In chapter 3, layout design of the sensors' chip and the process was elaborated.
第三章详细论述了铰链式结构加速度传感器芯片的版图设计和制作工艺流程。
In this thesis, we illustratre the theory of the chip, system design, partition of the modules, simulation and realization of analog circuit and layout design.
本文对芯片工作原理、系统架构设计、模块划分、前端模拟电路实现、版图设计等进行了详细分析。
With optimized circuit design and bump layout, high performance transmission lines for flip chip packages can be achieved using dry film as the masking material for the bump plating.
本实验显示经过最佳化的传输线路设计与凸块分布，低成本高效能的覆晶封装结构目标可以达成。
With optimized circuit design and bump layout, high performance transmission lines for flip chip packages can be achieved using dry film as the masking material for the bump plating.
本实验显示经过最佳化的传输线路设计与凸块分布，低成本高效能的覆晶封装结构目标可以达成。
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