The access time is important for the system chip with high performance, the low power has been the spotlight and challenge in VLSI design.

高性能的系统芯片对数据存取速度有了更严格的要求，同时低功耗设计已成为VLSI的研究热点和挑战。

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As the integrated circuit design has stepped into the deep ultra-submicron stage, the complexity of the circuit increases continually, chip test faces very huge challenge.

随着集成电路设计进入超深亚微米阶段，电路复杂度不断提高，芯片测试面临着巨大的挑战。

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Thus decreasing the area of chip is one of the most critical challenge to the IC backend designers.

因此在后端版图设计中，设计人员的目标之一就是应尽可能减小芯片的面积。

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Thus decreasing the area of chip is one of the most critical challenge to the IC backend designers.

因此在后端版图设计中，设计人员的目标之一就是应尽可能减小芯片的面积。

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