To speed up address translation, there is a processor-on-a-chip (PoC) cache and associated logic called translation lookaside buffer (TLB).
为了加快地址转换，架构中有一个 processor-on-a-chip (PoC)缓存和相关的转换后备缓冲器 (TLB)逻辑。
The on-chip programmable reference and reference buffer amplifier are configured for maximum accuracy and flexibility.
片内可编程基准电压源和基准电压缓冲放大器经过配置，可获得最高的精度和灵活性。
An on-chip LO buffer to drive the transmit up converter further reduces system complexity.
片内LO缓冲器用来驱动发送上变频器，进一步降低了系统的复杂性。
An on-chip LO buffer to drive the transmit up converter further reduces system complexity.
片内LO缓冲器用来驱动发送上变频器，进一步降低了系统的复杂性。
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