In this paper, we present a bit plane-parallel architecture for zero tree coding which is suitable for VLSI implementation.
提出了比特平面并行处理的零树编码结构。
The compression ratio of algorithm is more than 1.9. The compression algorithm based on bit plane transform can be realized by parallel computing model.
压缩比达到了1.9以上，与其它超光谱图像压缩算法相当。位平面变换算法具有很好的并行性。
For fast encoding, the bit-plane and pass dual-parallel approach is presented in this paper, which reduces the encoding time significantly.
为实现快速编码，该文提出一种位平面、过程双重并行编码方法，可以大幅度提高编码速度。
After video information read by FPGA, serial video information is transformed into parallel format by Bit-Plane Separation technology first, and then sent to video cable.
在FPGA读取视频信息后，先用位面分层技术把串行视频信息转换为并行数据再送到视频电缆上。
According to the research on the existing VLSI architecture of the bit-plane coding, a new VLSI architecture is proposed in which stripe-column and coding are both implemented in parallel.
研究了现有的位平面编码VLSI结构，设计了一种条带列与编码通道全并行的VLSI结构，解决了内部存储资源占用率高的问题。
The MQ coder is adopted in JPEG2000. In EBCOT algorithm, the tiles, code-block, bit-plane all can be implemented using parallel structure.
同时，在JPEG 2000中基于子带、码块和比特平面的编码都可以并行实现。 因此，MQ编码器的效率就成了JPEG 2000硬件高速实现需要解决的关键问题。
The MQ coder is adopted in JPEG2000. In EBCOT algorithm, the tiles, code-block, bit-plane all can be implemented using parallel structure.
同时，在JPEG 2000中基于子带、码块和比特平面的编码都可以并行实现。 因此，MQ编码器的效率就成了JPEG 2000硬件高速实现需要解决的关键问题。
应用推荐