The main constructivism teaching models are Scaffolding Instruction model, Anchored Instruction model and Random Access Instruction model.
其主要教学模式有：支架式教学模式、抛锚式教学模式和随机进入式教学模式。
Cognitive Flexibility Theory is an important branch of constructivism with its main contents of advanced learning, Random Access Instruction and Hypertext learning Environment.
认知弹性理论是建构主义学习理论的一个重要分支，其主要内容可归结为高级学习说：随机通达教学说和超文本学习环境说。
A program references storage using the effective address computed by the processor when it executes a storage Access or Branch instruction or when it fetches the next sequential instruction.
在程序执行StorageAccess或Branch指令或者在存取下一条顺序指令时，它将使用处理器计算出的有效地址引用存储设备。
The other main type of processor architecture, CISC (the x86 processor being a popular CISC instruction set), allows for memory access in nearly every instruction.
另外一种主要的处理器体系结构CISC (x86处理器就是一种流行的CISC指令集)几乎允许在每条指令中进行内存访问。
In this paper, we propose a performance analysis method on the study for instruction stream and memory access.
本文基于指令执行流和内存访问流的分析，提出一种性能分析的新方法。
The performance of parallel program is closely related to computer architecture, besides CPU, including system framework, instruction structure and access speed of storage unit.
并行程序的性能与计算机体系结构密切相关，不但取决于CPU，还与系统架构、指令结构、存储部件的存取速度等因素有关。
Electronic funds transfer (EFT) a transfer of funds either from or to an account, which is initiated by giving an instruction through an electronic access method.
电子资金转账(EFT)通过电子手段控制账户、发出指令将账户资金转入转出的操作。
In a computer using the Harvard architecture, the CPU can both read an instruction and perform a data memory access at the same time, even without a cache.
在使用哈佛架构的计算机中，即使没有缓存，CPU也可以在读取指令的同时进行数据访问。
The invention discloses a controller of a dynamic random-access memory (DRAM) and a user instruction treatment method.
本发明公开了一种动态随机访问存储器（DRAM）的控制器及用户指令处理方法。
The access channel is used for brief information exchanging, providing the source about the calling, the call responding, the instruction and the enrollment.
接入信道用于短信令消息交换、能提供呼叫来源、寻呼响应、指令和注册。
Another unique architectural feature is the memory system which allows an instruction fetch and at the same time a data access by each individual core at every single clock cycle.
另一个独特的构架特性是内存系统，它允许一个取指，并在同一时间，每一个核可以读取数据在每一个单独的时钟周期内。
Another unique architectural feature is the memory system which allows an instruction fetch and at the same time a data access by each individual core at every single clock cycle.
另一个独特的构架特性是内存系统，它允许一个取指，并在同一时间，每一个核可以读取数据在每一个单独的时钟周期内。
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