分析了锁相环的基本原理和实现，并对射频电路设计理论和阻抗匹配问题进行了探究。
Analyzing the basic theory and development of PLL, and studying the design theory and impedance match problem of experimental circuit board.
介绍了用集成锁相环路解码器LM567作为超声波检测元件，以89C51单片机作为主控元件的超声波液位测量的原理、电路及测控程序。
The theory, the circuit, and the program were introduced using LM567 as the component to detect the ultrasonic and using the MCU 89C51 as the main control component.
本文详细分析了QF1052B型标准信号发生器锁相环部分的基本组成及其工作原理，并提出了对此部分电路的检测方法。
This paper gives a detailed analysis of the principle of the phase lock circuit, one of the most important parts of the QF1052B Standard Signal Generator and provides some methods of checking it.
根据锁相环的原理，使用反射式光电传感器实现了系统的颜色识别。
According to the theory of phase-locked loop, we use reflected photoelectric sensor to carry out the color recognition.
本文叙述了用CD 4046锁相环实现频率自动跟踪的电路结构和工作原理。
This paper describes the electronic structure of which automatic frequency-tracking has been implemented with help of IC model CD4046 and its operating principle.
本文叙述了一个用微机控制的锁相环频率合成数字调谐系统的原理和设计。
In this paper the principle and design of a microcomputer-controlled PLL frequency synthesis digit tuning system is discussed.
这种采用锁相技术、同步检波的原理，降低了整个系统的成本，提高了灵敏度，并使得载波信号与调制信号完全达到同步。
The application of phase-locked and synchronous detection reduce the cost of the whole system and improve the sensitivity. Carrier signal and modulation signal achieve entirely synchronous too.
介绍了锁相环(PLL)技术和直接数字式频率合成(DDS)技术的基本工作原理，给出了一种提高DDS输出频率精度及减小其相位截断误差的方法。
This paper introduces the theory of the phase-locked loop (PLL) and the direct digital synthesis (DDS), a method to improve the precision of DDS and reduce its phase truncation error is also given.
根据磁机械耦合系数的测量原理，利用锁相放大器建立了磁机械耦合系数测量系统，并应用该系统测量了巨磁致伸缩材料的磁机械耦合系数。
The measurement system of magnetomechanical coupling coefficient for giant magnetostrictive materials has been built by using a lock-in amplifier, according to the measurement theory.
介绍了锁相环的基本原理和锁相环ne564的电路结构和性能，及其用ne564构成的锁相解调电路和锁相倍频电路。
Introduces the basic principle of phase-locked loop and NE564 PLL circuit structure and properties, and the use of phase-locked NE564 demodulating circuit and phase-locked frequency circuit.
介绍了锁相式频率合成器的工作原理以及频率合成器关键的性能指标。
The basic working principle and the crucial parameters of phase locked synthesizer are introduced in this paper.
利用锁相环路原理提出锁相自动准同期控制方案。
An automatic accurate synchronization control scheme which adopts phase locked loop principle is presented.
应用锁相环集成电路ne567对音频信号的鉴相原理实现对控制信号的译码输出，控制井下仪器马达工作。
The latch phase circle circuit NE567 functions as phase demodulation of audio frequency signals for realizing decoding output of the control signals to control the downhole motor operations.
对一般环形线圈检测器的原理进行了定量分析，提出了一种采用锁相技术的环形线圈车辆检测器的设计原理，并给出了相应的软件设计框图。
Based on the analysis of former Loop Vehicle Detector, the paper proposes a new design method of Loop Vehicle Detector, and gives the electronic circuit structure and software diagram.
在数字延迟锁相环设计中，先整体讲述电路的整体构架的设计，然后详细阐述了基本模块的实现方法与原理。
During the design of delay - locked loop, the frame of the whole circuit is introduced and then the principles and implementation of the basic modules are presented.
介绍了锁相环的基本原理，分析了锁相环各部分电路相位噪声的传递函数。
The basic principle of phase locked loop (PLL) has been introduced, and the transmission function of the phase noises of every part of PLL has been analyzed.
本文先介绍了锁相环的工作原理，环路滤波器的设计并对相位噪声的理论进行了阐述。
In this article, PLL theory, design of loop filter and phase noise theory are introduced at first.
描述了用EPROM实现晶闸管电压线性触发原理，讨论了用锁相环解决数字触发的频率扰动问题。
The principle of voltage linear digital triggering of thyristor by EPROM is described and it is discussed to solve the frequency disturbance on digital trigger by phase locked loop .
然后分析了锁相环中各个模块的工作原理以及它们对锁相环输出的影响。
Then some analyses are followed on the operation principle of each blocks and their influence on the PLL output signals.
随后，本文详细讨论了并网过程中的软件锁相环技术，对锁相环电路的组成、工作原理进行了研究。
Subsequently, the detailed discussion of the software phase-locked loop technology and network process, the composition of the phase-locked loop circuit, the working principle of the study.
首先对直接数字频率合成技术(DDS)和锁相频率合成技术(PLL)的基本原理、特点及相噪特性作了详细的分析。
Firstly the basic theory of DDS and PLL, as well as their characteristics and phase noise properties have been analyzed detailedly.
论文介绍了锁相环原理以及锁相环各组成模块的线性化模型，并进行了软、硬件设计。
Paper describes the principle of the PLL, the linearized model of its modules, its hardware and software implementation.
较详细介绍了分数分频锁相环的工作原理和特性，以及抑制分数分频锁相环相位调制边带的方法。
The operating principle and performance of fractional-N phase locked loop (FNPLL) are described in detail, and the methods of suppressing FNPLL phase modulation sideband are introduced.
介绍了锁相调频的基本原理，用锁相调频的射频直接调制方法实现了脉冲信号的低抖动传输。
The low jitter transmission of pulse signals is realized by direct RF-modulation based on PLL frequency modulation.
通过对锁相环原理进行深入的分析和研究，本论文针对CD MA无线通信标准，设计出了高速低功耗三阶电流型电荷泵锁相环。
In this thesis, a high-speed, low-power and third-order current-mode charge-pump PLL is designed according to the CDMA standard by in-depth analyzing and researching the principle of PLL.
通过对锁相环原理进行深入的分析和研究，本论文针对CD MA无线通信标准，设计出了高速低功耗三阶电流型电荷泵锁相环。
In this thesis, a high-speed, low-power and third-order current-mode charge-pump PLL is designed according to the CDMA standard by in-depth analyzing and researching the principle of PLL.
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