本文试图把时序逻辑电路和组合逻辑电路的设计，在概念上和方法上统一起来。
In this paper the writer tries to integrate the design of asynchronos counters of arbitrary carry system with the design of combinational logic circuits in concept and method.
根据组合逻辑电路的设计方法，突出用卡诺图化简逻辑表达式在并联比较型A/D转换器编码电路设计中的应用。
To stress the application of Karaugh map on designing of coding circuits in parallel-comparator ADC in terms of the design of combinational logic circuits.
根据设计要求，通过本程序的运行，可获得最佳的组合逻辑电路的参数。
According to a requirement of design, the optimum parameters of combinational logic circuits can be obtained after running the program.
在工程实践中利用中规模集成电路设计组合逻辑电路需要在设计理念和方法上做一定的改进，以适应工程设计计算机化和工程实际的要求。
It needs to have new ideas and ways in design to use Mid-scale integrate circuit to improve the Combined Logical circuit in engineering to meet the requirements of computerizing engineering design.
探讨了在卡诺图中利用阻塞法优化设计具有约束条件组合逻辑电路的原理和方法，并举例说明应用。
This paper probes into the principle and method of using blocking method to optimize the design of combinational circuits with restraint conditions and gives examples to illustrate their application.
介绍用中规模数字集成电路设计组合逻辑电路的原理和方法。
In this article, the method and theory of designing composite logic circuit by using middle scale digital integrated circuits is discussed.
介绍以中规模集成计数器为核心，结合中规模集成组合逻辑器件及少量门电路进行时序逻辑电路设计的方法。
This paper introduces one way to design scheduling logic circuit with medium-scale integrated counter at the core and based on MSI.
本文论述用ROM的存贮阵列构成新颖的组合逻辑电路和时序逻辑电路的基本原理，并给出两个实际的阵列式逻辑电路的设计方法。
This paper review elementary theory for new logic circuit with ROM memory array, and provide design method for two practical array logic circuit.
并且通过应用组合逻辑电路和VHDL语言实现两种方法，对照了两种实现方法的优劣及不同的设计流程和思想。
And combinational logic circuits by using VHDL language and in two ways, comparing the merits of the two implementations and different design processes and ideas.
为缩短理论与实践的距离，提高灵活应用数字元器件的能力，提出了组合逻辑电路设计的第五步。
To shorten the distance between theory and practice, improve the ability of flexible application of digital components, logic circuit design is proposed combination of the fifth step.
为缩短理论与实践的距离，提高灵活应用数字元器件的能力，提出了组合逻辑电路设计的第五步。
To shorten the distance between theory and practice, improve the ability of flexible application of digital components, logic circuit design is proposed combination of the fifth step.
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