在两种模式下，有效地址计算将使用所有64位相关寄存器(GPR、LR、CTR等)并生成64位结果。
In both modes, effective address computations use all 64 bits of the relevant registers (GPRs, LRs, CTRs, etc.) and produce a 64-bit result.
在这种情况下，有效地址总是分为两个32位的寄存器；高位寄存器是可选的，如果没有指定，就会被当作零进行处理。
The effective address is, under the hood, always split into a pair of 32-bit registers; the high-order register is optional and if it's not specified, it is treated as zero.
为了解决这一问题，乘法指令只使用每个32位的最低有效的16 位以便结果能够放进整个 32 位寄存器内。
To combat the problem, multiplication instructions only use the least-significant 16 bits of every 32-bit value so that the result will fit in the full 32-bit register.
这样就可以有效地对设备寄存器和位于SRAM中的某些标志位提供存取接口，而不再需要完整的布尔逻辑运算过程。
This allows efficient access to peripheral registers and flags located in SRAM memory without the need for a full Boolean processor.
这样就可以有效地对设备寄存器和位于SRAM中的某些标志位提供存取接口，而不再需要完整的布尔逻辑运算过程。
This allows efficient access to peripheral registers and flags located in SRAM memory without the need for a full Boolean processor.
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