毕竟，寄存器名实际上都是任意数字，这几乎没有任何含义。
After all, the register names are essentially arbitrary Numbers, which are nearly impossible to make sense of.
寄存器可以存放整个结构的地址，数字部分可以根据所访问的结构成员进行修改。
The register can hold the address of the whole struct, and the numeric portion can be modified depending on the structure member to be accessed.
float与long之间的区别不是数字本身之间的强制区别，而是芯片设计者如何使用寄存器和操作符所引起的一些简单后果。
The difference among an int, float, and long are not compelling distinctions among the Numbers themselves, but simply accidents of how chip designers have used registers and operands.
在基指针寻址模式中，寄存器中保存的是基址，数字是偏移量。
In base-pointer addressing mode, the register has the base address and the literal number has the offset.
少量的性能（没有力）提升——有些64位软件编译之后可以更好的利用64位的数字和附加寄存器，会产生一定的性能提升。
Performance Increase - A few 64-bit applications that have been compiled to take advantage of 64-bit integers and the additional registers available will yield a performance increase.
高层次综合也叫行为级综合，其基本任务是完成数字系统行为描述到寄存器传输级（RTL）描述的转换。
The main task is translating the behavioral description of a digital system into the design of RTL(Register Transfer Level).
由于寄存器传输级(rtl)行为描述可以精确地确定数字系统的操作，所以寄存器传输级综合成为当前EDA行业的主流设计方法。
Because the behaviors of digital system can be described by register transfer level (RTL) behavior exactly, RTL synthesis becomes the mainstream design method in EDA domain.
从16种编码开始，你可以用移位寄存器得到完全不同的数字模式。
From 16 starting codes, you got totally different digital patterns out of this shift register.
该数据选通器主要由CMOS传输门和CMOS移位寄存器构成，能同时适用于数字信号与模拟信号。
This device is constituted by CMOS transmission and CMOS shift register and is able to apply to the digital signal and analog signal at the same time.
由于寄存器的字长是有限的，因此要在数字滤波器的设计过程中考虑各种有限字长效应问题。
Because word-length of register is finite. It is necessary to consider the question about the finite word-length effect during the devising digit filter.
移位寄存器是用来寄存二进制数字信息，并能将存储的信息移位的时序逻辑电路。
The shift register is a sequential logical circuit, which can store and shift binary digit information.
数字信号处理器包含了中央算术逻辑单元、乘法器单元、移位器单元、排序器单元、辅助寄存器单元、中断单元的设计。
The digit signal processor embodies the center arithmetic logic unit, Multiplier unit, Shifter unit, Sequencing unit, Auxiliary register unit, interception unit.
输出数据通过串行或并行端口从输出寄存器中存取，这可实现与现代微控制器和数字信号处理器的轻松、高速接口。
The output data is accessed from the output register through a serial or parallel port. This offers easy, high speed interfacing to modern microcontrollers and digital signal processors.
本文介绍了一种使用非最长周期序列的非定长线性反馈移位寄存器作为数字系统内部测试生成器的方案，并给出了设计这种测试生成器的设计过程和算法。
In this paper, a scheme is presented, in which an infinite length's LFSR with non maximum cycle sequence is used as a built-in test generator in digital systems.
本文介绍了一种使用非最长周期序列的非定长线性反馈移位寄存器作为数字系统内部测试生成器的方案，并给出了设计这种测试生成器的设计过程和算法。
In this paper, a scheme is presented, in which an infinite length's LFSR with non maximum cycle sequence is used as a built-in test generator in digital systems.
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