The Phase I grant supported a six-month effort to develop a low-power 'green' battery with a 30-plus year shelf life that will power a SRAM (static random access memory) circuit for a computer device.
阶段I合同为期6个月，开发一个低功率“绿色”电池，附带30年保存期限，为计算机设备SRAM(静态随机存取内存)电路提供动力。
Presents a circuit of FIFO involving single port SRAM.
提出了一种基于单端口SRAM的FIFO电路。
With the SRAM capacity increasing, the circuit scale increases dramatically.
随着SRAM容量的提高，电路规模也急剧上升。
It is commonly believed that SRAM belongs to the volatile semiconductor memory.
通常认为，SRAM属于易失性半导体存储器。
This paper introduces the design technology of CMOS SRAM radiation harden circuit.
本文介绍了CMOSSRAM抗辐照加固电路的逻辑电路和版图加固设计技术。
A practical design of a dual-port SRAM embedded in OLED display driver ICs was presented.
详细描述了一种集成在OLED显示驱动芯片中的双端口SRAM设计。
SRAM BIST is also combined with ARM core's boundary scan testing during system level DFT.
系统级可测性设计主要是将存储器BIST与ARM核的边界扫描测试相结合。
The influence of single particle radiation to IC reliability, especial to SRAM, is analyzed.
本文分析了单粒子辐射对集成电路可靠性的影响，特别是对SRAM存储器的影响。
The high-speed and low power SRAM has become a hot research area in today's digital research fields.
目前，高速低功耗SRAM的研究成为数字集成电路领域中的研究热点之一。
A two-port SRAM memory cell (20) includes a pair of cross-coupled inverters (40) coupled to storage nodes.
一种二端口SRAM存储器单元(20)包括耦合到存储节点的一对交叉耦合的反相器(40)。
Designers traditionally think of SRAM in its most basic form, a single-ported, single-clock domain device.
设计人员总把SRAM作为其最基本的形式，即单端口、单时钟域器件。
It has adopted a kind of frame store method that utilize SRAM chip to solve the collection of video signal.
并且采用了一种利用SRAM芯片的帧存储方法来解决视频信号的采集问题。
A 32kb Static Random Access Memory (SRAM), which is widely used at present in VLSI, is designed in this paper.
目前，片上集成存储器一般采用静态结构，本文设计了一款32KB容量的静态随机存储器(SRAM)。
Traditionally, We used a CPU with a SRAM and an EEPROM to implement the control module on a wireless transmitting equipment.
无线传输设备控制模块传统的实现方法是采用一块处理器，附加SRAM、EEPROM等电路来实现。
A low-power bitline architecture in SRAM was proposed, the low bitline voltage was realized by incorporating two techniques.
提出了一种用于SRAM的低功耗位线结构，通过两种途径来实现低位线电压。
This paper introduces the hardware and software of a high speed graphic LED screen based on dual processors and dual port SRAM.
介绍了一种基于双处理器和双口sram的高速图形led屏的硬件和软件。
The SRAM programmable devices of ALTERA Corporation have been used widely, but its specified configuration devices are expensive.
ALTERA公司SRAM工艺的可编程器件应用广泛，但专用配置器件比较昂贵。
In this example, the metal one layer of a SRAM cell has been modified to reduce the probability of shorts between metal one nodes.
在这个例子中，静态随机存储器单元的金属层已被修改，以降低金属节点之间短路的概率。
Because of cost, capacity, transferring rate and power, SDRAM is more suitable than SRAM for high-speed digital image processing system.
综合成本、容量、速度和功耗因素，选择sdram作为数字图像处理系统的内存。
In one embodiment, the semiconductor device includes a static random access memory (SRAM) cell having numerous NFETs (110) and PFETs (112).
在一个实施例中，所述半导体器件包括具有多个NFET(110)和多个PFET(112)的静态随机存取存储器(SRAM)单元。
In this thesis, the design and implementation of security strategies for data remanence in SRAM are comprehensively and thoroughly investigated.
本论文将全面深入地论述SRAM中数据残留的安全策略设计与实现。
All byte wide memories have standard SRAM pinouts. they operate like SRAMs and provide nonvolatile storage with no requirement for battery backup.
所有字节宽度的存储器都有标准SRAM脚位输出，他们操作方式跟SRAM一样，并且提供非易失性存储，无需后备电池。
This paper introduced a soft built-in self-repair mechanism for embedded SRAM, and analyzed repair efficiency and area overhead of this mechanism.
本文介绍一种分段列冗余的软修复机制，并分析该修复机制的性能、面积开销。
Using the equipment, successfully make SRAM radiation effect experiment in laser testing equipment of radiation effect and HI-13 tandem accelerator.
利用该装置在激光辐射效应实验装置及HI- 13串列加速器上成功地进行了SRAM的辐射效应实验。
Decoder is one of the most important components in a memory unit, and its improvement can greatly diminish the access time of both register file and SRAM.
译码器是存储部件关键路径的重要组成部分，提高译码速度能有效提高寄存器文件和SRAM的读写速度。
The system makes use of two group of outer SRAM to buffer the frame data, and USES ping-pong operation of the SRAM to achieve the video display in series.
系统利用两组外部SRAM对帧数据进行缓存，采用乒乓操作来实现视频的实时连续显示。
The SRAM use a new design of two stage address transition detector to filter out the Unwanted chip select glitches when the SRAM is asynchronously operated.
本文提出了一种采用两级电路实现的地址变化探测器。与传统地址变化探测电路相比较，该设计显著提高了SRAM的抗噪声、抗干扰能力。
The IDT70V9289 is a new kind of high - speed synchronous dual - port SRAM made by IDT. It can be used to link two different kinds of high - speed data flows.
IDT70 V 9289是IDT公司新推出的一款高速同步双口静态存储器(SRAM)，可实现不同传输方式的双路高速数据流的无损传输。
This paper presents a hardware structure-independent weight-based fault injection model for accurate emulation of the radioresistance in the SRAM-based FPGA.
提出一种与具体硬件结构无关、基于权重的错误注入模型，用于准确模拟基于SRAM的现场可编程门阵列抗辐射性能。
This paper presents a hardware structure-independent weight-based fault injection model for accurate emulation of the radioresistance in the SRAM-based FPGA.
提出一种与具体硬件结构无关、基于权重的错误注入模型，用于准确模拟基于SRAM的现场可编程门阵列抗辐射性能。
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