Listing 5. lsattr output illustrating processor architecture.
清单5. lsattr输出说明了处理器的体系结构。
The source and destination servers must be at least POWER6 processor architecture-based systems.
源服务器和目标服务器必须至少位于基于POWER 6处理器架构的系统中。
The command takes three options: the operating system name, the processor architecture, and the profile.
此命令接受三个选项：操作系统名、处理器架构和概要文件。
Unlike other languages, assembly programming involves understanding the processor architecture of the machine that is being programmed.
与其他语言不同，汇编语言要求开发人员了解编程所用机器的处理器体系结构。
The POWER5 + processor architecture (running the AIX 5l operating system) addresses the page table problem by introducing multiple page sizes.
POWER5 +处理器架构(运行AIX 5l操作系统)通过引入多页面大小来解决页表问题。
Depending on the processor architecture, one form or the other might be necessary or more convenient.
根据处理器体系结构，一种形式或另一种形式也许是必要的或更为方便的。
A design method for control network nodes based on CPLD and multi-processor architecture is proposed in this paper.
论文提出了一种基于CPLD和多处理器结构的控制网络节点设计方法。
Thankfully, the three steps listed previously don't require inventing any truly new processor architecture concepts.
值得庆幸的是，前面所列的这三个步骤不需要发明任何真正新的处理器架构概念。
This paper presents VISA, a scalable processor architecture based on dynamic binary translation (BT) and optimization.
本文提出一种基于动态二进制翻译优化的可扩展处理器结构VISA。
The old publisher policy assembly cannot service your assembly once your assembly has a different processor architecture.
如果程序集具有不同的处理器结构，旧的发行者策略程序集则无法处理该程序集。
The thesis presents a highly efficient processor architecture design methodology for local compute-intensive applications.
本文提出了一种针对局部计算密集型应用的一种高效处理器架构的设计方法。
To obtain safe and tight WCET estimation, it is necessary to take account of the features of a target processor architecture.
为获得安全而紧致的WCET估计，需要考虑执行程序的目标处理器的体系结构特征。
This thesis aims to solve the problem that the network processor architecture faces and research the method of designing network processor.
本文针对网络处理器体系结构面临的问题，研究网络处理器的设计方法。
The research and experimental results in this dissertation can provide direction for the design and optimization of tiled processor architecture.
本文的研究工作和结果可用于指导分片式处理器的体系结构设计和进一步的优化。
In fact, this is one of the reasons why most of the general-purpose processor architecture companies are moving to multi-core solutions themselves.
事实上，这也是为什么大多数通用处理器架构的公司正在向多核心解决方案转型的原因之一。
The processor's fault tolerant mechanism mainly using temporal redundancy technique was implemented by modifying superscalar processor architecture.
处理器的容错机制是通过修改超标量体系结构，利用时间冗余技术实现的。
The other main type of processor architecture, CISC (the x86 processor being a popular CISC instruction set), allows for memory access in nearly every instruction.
另外一种主要的处理器体系结构CISC (x86处理器就是一种流行的CISC指令集)几乎允许在每条指令中进行内存访问。
If you don't have a compiler that can produce code to take advantage of the underlying processor architecture and instruction set, then the fastest machines will be useless.
如果您没有可以生成代码来利用底层处理器架构和指令集的编译器，那么最快的机器也将是无用的。
Modular parallel multi-processor architecture is used in this scheme, and de-multiplex and re-multiplex of relatively complicated MPEG-2transport stream can be realized.
该方案采用模块化并行多处理器结构，可实现较为复杂的MPEG-2传输流解复用、再复用的过程。
NOTE: if you develop a plug-in specific to an operating system or processor architecture, you could enter this information in the provided fields under Supported Environments.
注意：如果开发了一个特定于操作系统或处理器架构的插件，那么可以在Supported Environments下面所提供的字段中输入这些信息。
If your host and guest operating system are targeted to the same processor architecture, then you can speed things up to near native performance using the QEMU accelerator (KQEMU).
如果主机操作系统和来宾操作系统运行于相同的处理器架构之上，那么您可以使用QEMU加速器(KQEMU)实现近似本地的性能。
To perform hand optimization, you must understand the underlying processor architecture to fully understand how the code should be restructured to perform well on a given hardware platform.
要想执行手工优化，必须了解底层处理器体系结构，从而充分地了解应该如何重构代码才能在给定的硬件平台上实现良好的性能。
Based on the vector processing technique and the characteristics of crypto processing, we carried out our study on the design of efficient and flexible general crypto processor architecture.
本文以向量微处理器结构作为研究方向，结合密码的应用特点，研究能够高效灵活实现各类密码处理的通用密码处理器。
This paper proposes a novel efficient area reduction solution for hardware implementation of the advanced encryption standard (AES) algorithm which works in SSX11-140 secure processor architecture.
给出了在一种安全处理器(SSX11- 140)中有效缩减AES算法硬件实现面积的设计方案。
Processor architecture makes a lot less difference when compiling code than APIs do.
和API相比，处理器体系架构在编译代码时不会造成那么多的区别。
Then, the research is emphasized on the three main functions of a digital camera processor: architecture design, image processing and image compression.
然后，研究重点集中在数码相机处理器的三个主要功能上：结构设计，图像处理和图像压缩。
Then, the research is emphasized on the three main functions of a digital camera processor: architecture design, image processing and image compression.
然后，研究重点集中在数码相机处理器的三个主要功能上：结构设计，图像处理和图像压缩。
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