Multiple DSP parallel digital signal processing system is one of most important method for high-speed DSP system, which find wide application in many different spheres.
多信号处理器并行运算是提高数字信号处理系统运行速度的主要方法之一，具有广阔的应用前景。
Test results indicate that this solution leads to much more flexibility and reliability, and the performance of the equipment is also improved thanks to parallel digital signal processing.
测试结果表明，采用并行化的数字信号处理，增强了设备的灵活性和可靠性，并提高了设备的性能。
Qiapter 2 described the characteristic and performance of the high speed digital signal processor, analyzed and researched three kinds of parallel processing system structure based on DSP.
第2章论述了高速数字信号处理器的特点和性能，对基于DSP的三种并行处理体系结构进行了分析研究。
This paper presents a method of the I2S standard audio data and ITU-R 656 format digital video signal processing through synchronous serial port and parallel peripheral interface in DSP.
介绍了一种采用DSP的同步串口和并行外设接口，对I2S标准音频数据和ITU - R 656格式数字视频信号进行处理的方法。
TMS320C80 is a digital signal processor of MIMD structure, which provides a solid foundation for real-time parallel signal processing.
TMS320C80是一种MIMD结构的数字信号处理芯片，为实时并行信号处理提供了强有力的保证。
Then based on the digital signal processor DM642 of TI company, the paper introduces its own digital port. The video port is a bidirectional, high-speed and parallel processing port.
其次以TI公司DM642数字信号处理器为基础，介绍了其特有的数字视频口，该视频口是一种双向，高速的并行处理接口。
Based on one key project, a high-speed digital parallel analyzing system is introduced. The flow of operation of the signal processing program in DSP is defined in detail.
基于某重点工程项目，介绍了一种高速数据并行处理系统，并详细说明了DS P中信号处理程序的操作流程。
FPGA using digital signal processing, distributed algorithm plays a key role with the traditional product-plot structure compared with the efficient parallel processing features.
在利用FPGA实现数字信号处理方面，分布式算法发挥着关键作用，与传统的乘积-积结构相比，具有并行处理的高效性特点。
Then, basing on this platform, a high speed real-time digital signal processing of radar is carried out, making good use of the parallel design of algorithm and a reasonable assignment of tasks.
在此平台的基础上通过对信号处理算法的并行设计，以及对处理任务的合理分配，实现了高速实时雷达信号处理。
Management and scheduling of multi-DSPs (Digital Signal Processing) is the basic elements of controller with parallel and reconfigurable architecture.
多dsp的管理与调度是多处理器并行、可重构结构体系控制器的基础。
Through parallel arithmetic research, a high-parallel-efficiency Radar signal digital pulse compression processing system is designed and optimized, and corresponding experiment result is obtained.
在并行算法研究的基础上，设计并优化了一个高并行效率的雷达信号数字脉冲压缩系统，得出了相应的实验结果。
Then an adaptive parallel processing algorithm for digital signal linear prediction can be given.
由此进一步推导可得到数字信号序列参数线性预测的自适应算法。
Then an adaptive parallel processing algorithm for digital signal linear prediction can be given.
由此进一步推导可得到数字信号序列参数线性预测的自适应算法。
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