Logic simulation is a necessary step in design of ASIC.
逻辑模拟是ASIC设计中必不可少的一个环节。
The ASIC chip of speech decoder is designed in this paper.
系统是要完成一个语音解码芯片的专用集成电路的设计。
All these factors have made FPGAs viable alternative to ASIC design.
所有这些因素是FPGA成为一种替代asic设计的可行方案。
This demands highly on the technology and power consumption in the ASIC design.
在用专用集成电路实现时，对集成电路的工艺和功耗都提出了很高的要求。
However, full custom power management ASIC development historically has been expensive, slow-to-market, and pretty risky.
然而，全定制的电源管理IC开发一向昂贵，进入市场缓慢，并且有很大的风险。
However, full custom power management ASIC development historically has been expensive, slow-to-market, and pretty risky.
然而，全定制的电源管理IC开发一向昂贵，进入市场缓慢，并且有很大的风险。
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