The method is a fully-digitized process at the sampling clock rate, so that it can be conveniently implemented by FPGA or DSP, whose synchronization precision can reach 1% of the sampling interval.

该方法是一种基于信号采样时钟速率的全数字化处理过程，其同步精度可达到信号采样间隔的1%以上，且便于FPGA或DSP实现。

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The method is a fully-digitized process at the sampling clock rate, so that it can be conveniently implemented by FPGA or DSP, whose synchronization precision can reach 1% of the sampling interval.

该方法是一种基于信号采样时钟速率的全数字化处理过程，其同步精度可达到信号采样间隔的1%以上，且便于FPGA或DSP实现。

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