Care must be taken when connecting logic circuits to ensure that their logic levels and current ratings are compatible.
连接逻辑电路时，必须小心翼翼，以保证他们的逻辑电平和电流额定值是兼容的。
This paper expatiates on synthesis of quantum reversible logic circuits.
本文阐述的重点是量子电路的可逆逻辑综合问题。
A technique to design a fuzzy controller by using digital logic circuits is proposed.
提出了一种用数字逻辑电路设计模糊控制器的方法。
L298 also provides an additional input, so the logic circuits can work at lower voltages.
L 298还提供一个额外的电压输入，所以其逻辑电路可以工作在更低的电压下。
They are divided into two parts: digital control logic circuits and analog macro circuits.
总体分为两部分：数字控制逻辑电路和模拟宏单元电路。
In the control logic circuits, pipelined control is used to speed up the processing throughput.
在电路的控制逻辑中，采取了流水线操作，进一步提高了处理速度。
The methods have useful reference value to using correctly flip-flops and designing sequential logic circuits.
这些方法对于正确使用触发器和设计时序逻辑电路有重要应用参考价值。
In order to avoid clock skew familiar in high-speed sequential logic circuits, buffers are placed in clock-tree.
为了避免高速时序电路中常见的时钟偏差，在时钟树中放置了缓冲器。
In addition, the RFI (radio frequency interference) generated may disrupt high speed logic circuits in the system.
此外，由此产生的射频干扰(RFI)可能会中断系统中的高速逻辑电路。
No CPU is needed for the fuzzy controller circuit. All algorithms are realized for high speed by digital logic circuits.
该模糊控制器电路不用cpu，全部算法由数字逻辑电路实现，具有运算速度快的特点，适合于需要高速控制的场合。
Arcing: The RFI (radio frequency interference) generated by high voltage switching may disrupt high speed logic circuits.
电弧：高压切换产生的RFI(射频干扰)可能会干扰高速逻辑电路。
The reasoning process called for by Boolean algebra are implemented through switches acting as electronics logic circuits.
布尔代数所需的推理过程是通过开关来实现的，这些开关起着逻辑电路的作用。
Fluid power systems and components. Fluid logic circuits. Part 2: symbols for supply and exhausts as related to logic symbols.
液压和气压传动。液力逻辑线路。第2部分：与逻辑符号相对应的供液和排液符号。
A computer is comprised of some logic parts which have serial logic functions, and the adder is one of the combine logic circuits.
电子计算机是由具有各种逻辑功能的逻辑部件组成的，加法器就属于其中的组合逻辑电路。
According to a requirement of design, the optimum parameters of combinational logic circuits can be obtained after running the program.
根据设计要求，通过本程序的运行，可获得最佳的组合逻辑电路的参数。
The main work is listed below:· A method of synchronizing asynchronous logic for TFT-LCD controller driver logic circuits is proposed.
论文的主要工作如下：·针对TFT-LCD驱动控制芯片的异步接口和控制逻辑采用了一种异步逻辑同步化的处理方法。
QBTL is designed specially for use as a four-valued threshold gate with which varied four-valued composite logic circuits can be formed.
其中QBTL设计成可单独作为四值“阀”门使用，用于构成其他四值组合逻辑。
The key of optimizing quantum reversible logic lies in automatically constructing quantum reversible logic circuits with the minimal quantum cost.
最优化量子可逆逻辑的关键在于用最小的量子代价自动构造量子可逆逻辑。
This paper proposed a new algorithm of retiming which can be combined well with other combinational optimization methods to speed up logic circuits.
提出了一种改进时序重排算法，使时序重排可以更有效地与其他组合优化算法结合起来，共同提高同步时序电路的速度。
As a result, they could potentially underpin a new generation of high density, non-volatile memory chips and logic circuits that mimic biological synapses.
因此，它们具有打造下一代高密度、非易失存储芯片和模仿生物神经节的逻辑电路的潜力。
To stress the application of Karaugh map on designing of coding circuits in parallel-comparator ADC in terms of the design of combinational logic circuits.
根据组合逻辑电路的设计方法，突出用卡诺图化简逻辑表达式在并联比较型A/D转换器编码电路设计中的应用。
Through the adoption of the logic circuits, this article will successfully actualize the EPLL, which is based on the sample data, and validate this project in FPGA.
本文采用逻辑电路实现了基于采样数据的EPLL数字锁相环算法，并在FPGA电路中实现和实验验证该设计。
An efficient algorithm is presented, which can construct optimal reversible logic circuits of quantum with various types of gates and quantum costs by using the Hash table.
利用该算法可对多种量子门采用任意量子代价标准，以较高的效率生成最优的量子可逆逻辑电路。
Furthermore, in order to avoid clock skew familiar in high-speed sequential logic circuits, negative clock skew system is used in clock routeway and buffers are placed in clock-tree.
此外，为了避免高速时序电路中常见的时钟偏差，时钟通道采用负时钟偏差系统，并在时钟树中放置了缓冲器。
The properties of Boolean difference are made use of to derive a new method for fault testing in combinational logic circuits. This method is simpler and different from the traditional one.
本文利用布尔差分的性质，给出了一种不同于传统的求组合逻辑线路故障测试码的新方法，对故障测试有一定的简化作用。
Telecom network resource Management System is the most important part of OSS. It can manage, configure and dispatch resources including network devices, physical circuits and logic circuits.
电信数据网络资源管理系统是OSS系统中的重要部分，实现电信数据网络上的各种网络设备，物理链路，用户链路等资源信息的维护，配置，调度等功能。
In this paper, DT flip - flop excitation table is developed, the design method of sequential logic circuits using DT flip - flop is presented, and the design example using the method is given.
导出了DT触发器的激励表，提出了应用DT触发器的时序逻辑电路的设计方法，并给出了设计实例。
In system digital part design, all outer logic circuits of Single chip microcomputer are implemented in CPLD. That makes the volume of the system smaller and improve the reliability of system.
在系统数字部分的设计中，采用CPLD来实现单片机外部的逻辑电路，大大缩小了整个系统的体积提高了系统的可靠性。
The results of simulation prove that the improved algorithms are feasible for evolving the digital combinational logic circuits and improve the evolvable efficiency and convergence performance.
仿真实验结果证明了改进演化算法对于实现函数级数字组合逻辑电路的硬件演化是可行的，并且提高了演化算法的演化效率和收敛性能。
The results of simulation prove that the improved algorithms are feasible for evolving the digital combinational logic circuits and improve the evolvable efficiency and convergence performance.
仿真实验结果证明了改进演化算法对于实现函数级数字组合逻辑电路的硬件演化是可行的，并且提高了演化算法的演化效率和收敛性能。
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