Standard logic cells, memory design and IO cell design.

标准逻辑单元，存储电路设计及输入输出单元设计。

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Standard logic cells, memory design and IO Layout design.

标准逻辑单元，存储电路设计及输入输出单元版图设计。

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The circuits work well in practice and the new methods can decrease the complexity of the implementation of the synchronization algorithms, and save the logic cells of FPGA.

实践证明，该电路可以稳定工作，改进的算法可以有效的降低实现复杂度，减少算法实现所需的逻辑单元。

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The circuits work well in practice and the new methods can decrease the complexity of the implementation of the synchronization algorithms, and save the logic cells of FPGA.

实践证明，该电路可以稳定工作，改进的算法可以有效的降低实现复杂度，减少算法实现所需的逻辑单元。

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