Phase-locked loop (PLL) has been applied in many fields.
锁相环在很多领域都得到了广泛应用。
Phase locked loop technique offers a way to resolve this problem.
锁相式频率合成技术提供了解决这一问题的思路。
A fast all digital phase-locked loop with automatic modulus control is presented.
提出了一种具有自动变模控制的快速全数字锁相环。
A novel Frequency and Phase Tracking Locked Loop (FPTLL) is proposed in this paper.
本文介绍了一种新型频率相位追踪锁定环路（FPTLL）的设计。
It also give an improved method for PLL (phase locked loop) to extract coherent carrier.
本文还对相干载波提取中的锁相环提出了一种改进方法。
The authors propose an improved phased locked loop (PLL) architecture with dual control paths.
提出一种改进的双控制通路锁相环结构。
The phase jitter of output signal of the PLL( phase locked loop) frequency doubler is analyzed.
定量分析了数字式锁相倍频器输出信号的相位抖动。
In this thesis the basic architecture and the performance evaluation of phase-locked loop are presented.
本文研究了锁相环的基本结构与系统构架及其性能优劣。
Slip correlative taking and delay locked loop are used for the synchronization, taking, locking of PN code.
采用滑动相关捕获和延迟锁定环实现伪码的同步、捕获和跟踪；
An automatic accurate synchronization control scheme which adopts phase locked loop principle is presented.
利用锁相环路原理提出锁相自动准同期控制方案。
In phase-coherent communication system, phase-locked loop is always used to yield coherent reference signal.
相位相干通信系统中，通常采用锁相环路来产生相干参考信号。
Furthermore, the working principle and phase noise of frequency-locked loop are analyzed and discussed in this paper.
给出了实验结果，并对锁频环的工作原理、相位噪声进行了分析和讨论。
Anovel approach to implement symbol timing recovery is presented which USES a hybrid digital phase locked loop (HDPLL).
本文介绍了一种利用混合数字锁相环(HDPLL)实现码元定时恢复的新方法。
According to the theory of phase-locked loop, we use reflected photoelectric sensor to carry out the color recognition.
根据锁相环的原理，使用反射式光电传感器实现了系统的颜色识别。
The paper studies digital control scheme of resonance inverter frequency-tracking based on all digital phase-locked loop.
本文主要研究了基于全数字锁相环的谐振型逆变器频率跟踪的数字化控制方案。
The paper introduces a kind of clock recovery system based on phase-locked loop with bi-directly incident phase-comparator.
介绍了一类基于双向输入型鉴相器锁相环技术的时钟恢复系统。
The possibility of using this kind of phase-locked loop under noise interference and the problems of filter design are discussed.
文中还讨论了在噪声作用下采用这种环路的可能性和滤波器的设计问题。
We present a design for an adaptive gain phase-locked loop (PLL) that features fast acquisition, low jitter, and wide tuning range.
提出了一种快捕获，低抖动，宽调节范围的增益自适应锁相环的设计。
The industrial grating signals can be digital frequency multiplication with a phase-locked loop (PLL) controlled by a microcomputer.
用微型计算机控制锁相环(PLL)可对计量光栅信号进行数字倍频。
The digital very narrow-bandwidth Phase-Locked Loop(PLL) is designed and realized for the digital range and velocity measurement receiver.
本文正是为数字化测速测距接收机设计并实现全数字化超窄带锁相环。
Then presented the basic structure, phase model, frequency response and performance analysis for noise and spur, of phase locked loop (PLL).
然后介绍了锁相环(PLL)的基本结构、相位模型、频率响应、噪声及杂散性能。
The software phase-locked loop (SPLL) technology in the steady speed control of permanent magnet brushless DC motor (BLDCM) in gyro was discussed.
研究了软件锁相环技术在陀螺用无位置传感器无刷直流电机稳速控制系统中的应用。
Based on digital delay-locked loop, the mix signal technique is used to implement the digital delay locked loop with the resource control technique.
以数字延迟锁相环为基础，并采用数模混合技术，实现了带电源控制的数字延迟锁相环。
The phase- locked loop is one kind of control system which is able to achieve phase automatic lock, to compose frequency and to trace demodulation system.
锁相环路是一种能实现相位自动锁定的控制系统，主要用于频率合成及跟踪解调系统。
In the process of signal digital intermediate-frequency received, digital down convertion, frequency tracking of carrier and phase locked loop are the keys.
在信号的中频数字接收过程中，数字下变频、载波频率与相位跟踪是设计的关键所在。
The design and implementation of quadrature waveform generator are described based on the AT89C52, phase-locked loop(PLL) and switched-capacitor filter(SCF).
描述了基于AT89C52单片机、锁相环和开关电容滤波器的正交信号发生器的设计和实现方法。
To this end the current multipath estimation delay locked loop(MEDLL) was investigated and improvements were proposed based on the zero-point fixed principle.
为了消除扩频系统中的多径干扰，文章基于稳态零点不变的原则对多径估计延迟锁相环（MEDLL）进行研究及改进。
This article presents a new design structure of variable bandwidth phase-locked loop based on improving phase-locked loop of actively mode-locked fiber laser.
对主动锁模光纤激光器的锁相环进行改进，提出一种新型的“变带宽锁相环”的设计结构。
Unlike previous researches, the nonlinear analysis on the effects of delay-difference module employed in the delay phase-locked loop (DPLL)is particularly presented.
与以往研究不同，针对延迟锁相线性化环路的延迟差分环节，着重分析了其非线性特性对环路性能的影响。
This paper presents a simple tracking filter circuit, which is applicable to Doppler radar sets and consists mainly of a switched bandpass filter and a phase-locked loop.
本文提出一种简单的跟踪滤波器电路，该电路可用于多普勒雷达，主要由开关式带通滤波器和锁相环组成。
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