With the signal from the master clock, the slave clock is able to recover an accurate local clock signal using a Clock Recovery Phase Locked Loop (PLL).
从时钟利用主时钟发来的时钟信号,通过数字锁相环恢复出本地时钟信号。
With the signal from the master clock, the slave clock is able to recover an accurate local clock signal using a Clock Recovery Phase Locked Loop (PLL).
从时钟利用主时钟发来的时钟信号,通过数字锁相环恢复出本地时钟信号。
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