To architect this utility to run as a fast as possible, the buffer manipulator has been coded such that it doesn't have to give data to a specific device controller.
为了为这个实用程序设计尽可能快的架构，在对缓冲区操纵者编写代码时，已经使它不必将数据发给特定的控制器。
Controller 218 typically contains buffer memory for the user data being written to, or read from, the memory array.
控制器218通常含有缓冲存储器以用于将用户数据写入到存储器阵列或从存储器阵列读取用户数据。
When DRNN predicts that the number of cells in buffer exceeds the threshold limit in the next time cycle, a control signal is generated by the controller to throttle arrival cell rate.
当DRNN预测下一时刻缓冲区中的信元数超过阈值时，控制器产生一个反馈控制信号减小信源进入网络的信元速率以避免拥塞发生。
In this system, computer software was used to replace stepping motor controller which consisted of buffer, annular allotter, control logic and control doors of clockwise and counterclockwise running.
在系统中，用计算机软件替代了由缓冲寄存器、环形分配器、控制逻辑及正反转控制门组成的步进电机控制器。
The step motor controller composed of buffer register, the circular allotter, the control logic, the positive run and back run control circuits is replaced by computer software.
由缓冲寄存器、环形分配器、控制逻辑及正反转控制门组成的步进电机控制器则用计算机软件替代。
According to a running operating system, an address translation controller accesses a corresponding address translation buffer to translate virtual addresses to real addresses.
根据正在运行的操作系统，地址转换控制器访问对应的地址转换缓冲器，以将虚拟地址转换成真实地址。
Each CAN controller provides a double Receive Buffer (RBX) per CAN channel to store incoming messages until they are processed by the CPU.
每一个CAN控制器提供给每个CAN通道一个双接受缓冲区来存储接受的信息直到他们被CPU处理掉。
The controller receives a data block from an external rewriting device to store it in the first buffer.
该控制器从外部重写装置接收数据块并将其存储在第一个缓冲区。
The ECC controller transmits the data to a direct memory access (DMA) buffer for transfer to the host device, and to an ECC block for error detection and correction of the data.
ECC控制器将数据发送给用于将数 据传送到主机装置的直接存储器存取（DMA）缓冲器以及用于对数据进行错误检测和纠错的ECC块。
The FPGA is designed as a MVB controller which consists of Manchester encoder, Manchester decoder, buffer, center control unit, internal memory, MCU interface and so on.
FPGA实现MV B控制器功能，分为曼彻斯特编码器、解码器、缓冲区、中央控制单元、内部存储器和单片机接口等几部分。
The liquid level in the buffer tank is controlled by the liquid level controller, making the fluid infusion pump started and stopped timely, and a certain liquid level can be kept in the buffer tank.
缓冲罐中的液位由液位控制器控制，使补液泵及时启动、停泵，使罐内保持一定的安全液位；
The USB host controller is connected to a USB device comprising one or more end points, and comprises a buffer.
USB主机控制器连接到包括一个或多个端点的USB设备，并且包括缓冲器。
The USB host controller is connected to a USB device comprising one or more end points, and comprises a buffer.
USB主机控制器连接到包括一个或多个端点的USB设备，并且包括缓冲器。
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