CIC filter has proven to be a very effective cell in high-speed decimation and interpolation systems.
CIC滤波器已经被证明是在高速抽取和插值系统中非常有效的单元。
In this paper, the high decimation ratio of digital down converter is studied and the multi-stage decimation algorithm is especially analyzed based on CIC filter, CFIR filter and RRC filter.
研究了高倍抽取的数字下变频设计，重点分析了基于级联积分梳状滤波器、级联补偿滤波器、级联根升余弦滤波器的多级抽样频率算法。
A programmable decimation and interpolation ratio module onnected with multistage cascade integrator comb (CIC) filter is designed to implement high efficient decimator and interpolator.
将可编程抽取、插值器与多级积分梳状滤波器（CIC）相配合，实现高效数字抽取和插值模块。
This paper studies high decimation ratio of digital downconverter given narrow-band signal, and especially analyze mul? stage decimation algorithm based on CIC filter and HB filter.
本文研究了窄带信号条件下，高倍抽取的数字下变频设计，重点分析了基于CIC滤波器和HB滤波器的多级抽取算法。
This paper studies high decimation ratio of digital downconverter given narrow-band signal, and especially analyze mul? stage decimation algorithm based on CIC filter and HB filter.
本文研究了窄带信号条件下，高倍抽取的数字下变频设计，重点分析了基于CIC滤波器和HB滤波器的多级抽取算法。
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