传统晶体管使用一个叫做“栅极”的金属电极，以控制电子在平面硅基片上的沟道中的流动。
Conventional transistors use a metal electrode, called the gate, to control the flow of electrons through a planar channel in the silicon substrate.
现在研究者正在努力优化器件结构、石墨烯性质和栅极电介质以提高晶体管性能。
The team is now busy working on improving the performance of the transistors by optimizing device structure, graphene quality and the gate dielectric.
5月，美国芯片巨头因特尔(Intel)公司(由摩尔博士与他人共同创办)宣布了一个计划，将这种市场名为“三栅极”的晶体管技术方案商业化。
In May Intel, an American chip giant (co-founded, as it happens, by Dr Moore), announced plans to commercialise a technological fix of this sort under the marketing name "Tri-Gate".
在半导体中的源极区和漏极区可以限定晶体管栅极长度。
Source and drain regions in the semiconductor may define a transistor gate length.
解决上述问题的方法是自动控制输出电路MOS管的栅极电压变化率。
This problem can be solved by controlling the variety speed of the G-S(grid-source) voltage of MOS transistors.
为了增加更多的死区时间，补偿功率管的切换瞬间短暂延时，增加了一个肖特基二极管，与栅极电阻。
The schottky diode bypasses the gate resistor in the gate discharge path, so that there is no falling edge delay. The delay at the rising edge adds dead time.
采用高频脉冲微束等离子弧做为电子管阴极和光刻栅极装配钎焊工艺的热源，提高了钎缝质量和产品的可靠性。
Brazing quality and product reliability are both increased as using high frequency pulse microplasma arc heating process for assembly brazing of cathode and photoetching grid of electron tube.
在高频头中的射频电平调节电路中使用了双栅极场效应管；
Employing a bigrid EFT, the modulator circuit in the rf head is designed for rf level control.
利用MOS管、半桥驱动芯片LM27222、栅极驱动变压器等器件，设计了变极性矩形波发生电路。
A rectangular wave generating circuit has been designed with MOSFETs, half bridge driver chip LM27222 and gate drive transformer.
为了理解有机静电感应三极管的肖特基栅极原理，本文在第二章阐述了PN结和肖特基结的特性。
In order to comprehend schottky gate of organic static induction transistor, chapter two expatiates characteristics of PN junction and schottky junction.
介绍了一种用大功率绝缘栅极双极型晶体管(IGBT)模块SKM75GA L 123d和驱动模块EXB840设计的直流升压斩波器。
A design of boost converter using high-power insulated bipolar transistor IGBT module named SKM75GAL123D and driver module named EXB840 is introduced.
使用V形槽工艺，用溅射铝的方法代替扩硼工艺制备静电感应晶体管的栅极区，简化了工艺流程，使器件在调试过程中具有很大灵活性。
The gate region was fabricated by V-groove and Al sputtering, which can simplify the process, and make devices flexible in the adjustment process.
在给定晶体管中的第一栅极导体和第二栅极导体的相对尺寸控制晶体管的阈值电压。
The relative sizes of the first and second gate conductors in a given transistor control the threshold voltage for the transistor.
每个晶体管可以由形成在半导体上的栅极绝缘层形成。
Each transistor may be formed from a gate insulating layer formed on a semiconductor.
基于双栅极空气计数管的工作原理，提出了多路输出电源的设计指标。
By the working principle of Double Grid Air Counter (DGAC) employed in detecting exoelectron emission, we put forward the design specifications of the power supply.
无论是高边和低边输出，采用了集成的功率DMOS晶体管是能够采购和栅极驱动电流2a沉没的。
Both the high side and low side outputs feature integrated power DMOS transistors that are capable of sourcing and sinking 2a of gate drive current.
该工具可以产生用于特定设计的制造掩模，该设计包括具有优化的阈值电压的混合栅极晶体管以符合电路设计标准。
The tool may generate fabrication masks for the given design that include mixed gate transistors with threshold voltages optimized to meet circuit design criteria.
所述检测器可以测量所述功率输送电路的晶体管开关的节点处的电压，尤其是栅极处的电压。
The detectors may measure voltages at nodes of transistor switches of the power delivery circuit, particularly at the gates.
在图5 - 1中所示的电路中，可控硅的栅极通过一个电阻器和二极管直接将其阳极连接。
In the circuit shown in Figure 5-1, the gate of the SCR is connected through a resistor and diode directly to its anode.
它采用了绝缘栅极双极型二极管和电压型换流器，控制和运行方式简单，输出波形好，具有广阔的应用范围和良好的发展前景。
It can be widely used for its easy and simple control and operation as well as for its good output waveforms.
具有栅极的二极管非易失性存储单元，其具有电荷储存结构，包括具有额外栅极端的二极管结构、与位于二极管节点之间的扩散阻挡结构。
A gated diode nonvolatile memory cell with a charge storage structure includes a diode structure with an additional gate terminal and a diffusion barrier structure between the diode nodes.
晶体管栅极可以由具有不同功函数的第一栅极导体和第二栅极导体形成。
The transistor gate may be formed from first and second gate conductors with different work functions.
一种影响是在保持、甚至改善栅极漏电水平的同时改善晶体管性能。
One affect is to improve the transistor performance while retaining or even improving the level of gate leakage.
如此形成的晶体管的阈值电压由保持在浮动栅极上的电荷量控制。
The threshold voltage of the transistor thus formed is controlled by the amount of charge that is retained on the floating gate.
二极管d2用作栅极保护二极管。
在读取操作期间，该读取晶体管被激活以产生指示储存在该浮置栅极节点中的电荷的输出信号。
During a read operation, the read transistor is activated to produce an output signal indicative of the charge stored in the floating gate node.
一隔离结构位于沟槽式栅极的底部并与沟槽式栅极绝缘，从而对沟槽式栅极与肖特基二极管两者提供屏蔽效应。
A shielding structure is disposed at the bottom and insulated from the trenched gate to provide shielding effect for both the trenched gate and the Schottky diode.
以及一电压提升装置，用以控制该第一MOS晶体管及该第二MOS晶体管的栅极；
The voltage lifting device controls grid electrodes of the first MOS transistor and the second MOS transistor.
该碳纳米管场发射体可防止栅极与碳纳米管之间发生短路。
The field emission body of Nano carbon tube can prevent short circuit from occurring between grid and Nano carbon tube.
该碳纳米管场发射体可防止栅极与碳纳米管之间发生短路。
The field emission body of Nano carbon tube can prevent short circuit from occurring between grid and Nano carbon tube.
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