The issue of interconnect capacitance rising from very large scale integration(VLSI)with a decreased feature size and increased number of wiring layers is described.

阐述了超大规模集成电路（ VLSI）特征尺寸的减小及互连线层数增加引起的互连线电容增加的问题。

youdao

The issue of interconnect capacitance rising from very large scale integration(VLSI)with a decreased feature size and increased number of wiring layers is described.

阐述了超大规模集成电路（ VLSI）特征尺寸的减小及互连线层数增加引起的互连线电容增加的问题。

youdao