For any normal input, the circuit's output voltage, VOUT, equals its input voltage, VIN.
对于任何正常输入，电路的输出电压VOUT等于其输入电压VIN。
Pulse width generator 404 generates a falling edge in VOUT a delayed period of time after the falling edge in VIN.
在VIN下降沿后的延迟时间周期中，脉冲宽度发生器404产生VOUT的下降沿。
Thus, pulse width generator 404 generates a delay between a falling edge of VIN and a subsequent falling edge of VOUT.
因此，脉冲宽度发生器404在VIN下降沿和随后的VOUT下降沿之间产生延迟。
High precision extended temperature applications of the circuit of Figures 19, 20 require that the range of adjustment of VOUT be restricted.
由于温度因素会影响精度，图19、20中电路的输出电压范围不能太宽。
When the select signal is a logic high (1), multiplexer 510 transmits the output signal of inverter 504 to the output of generator 404 as output signal VOUT.
当选择信号为逻辑高电平（1）时，乘法器510传输反相器504的输出信号给发生器404的输出作为输出信号VOUT。
In a second sub-mode ('low output power sub-mode'), VOUT is regulated using pulse width modulation, but the converter switching frequency is fixed at a first frequency.
在第二子模式（“低输出功率子模式”）中，使用脉冲宽度调制来调节VOUT，但转换器开关频率固定在第一频率。
In a second sub-mode ('low output power sub-mode'), VOUT is regulated using pulse width modulation, but the converter switching frequency is fixed at a first frequency.
在第二子模式（“低输出功率子模式”）中，使用脉冲宽度调制来调节VOUT，但转换器开关频率固定在第一频率。
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