PLL circuit is adopted in order to control video signal synchronization.
系统中采用锁相环路控制视频同步。
This article introduces that in a new design of radar raster-displaying terminal, SDRAM is used as video frame memory and FPGA is adopted to carry out the process of control circuit.
SDRAM作为雷达光栅显示视频帧缓冲存储器，通过FPGA器件实现对SDRAM的控制，已成功应用于一款雷达光栅显示终端。
This paper describes a CRT video circuit with pre-amp and driver control. This system includes pre-amp circuit, clamp pulse production, blank level...
设计一种视频处理电路，通过介绍一种前置放大，CRT驱动的视频处理电路，系统包括前置放大电路、钳位脉冲形成、CRT驱动电路、白平衡调整等部分。
Conventional video encoder needs large amount of extra memory and circuit to implement the motion-detection function, and has a large computational complexity on rate-control function.
传统视频编码器需要增加大量额外的存储器和电路完成以运动检测功能，且码率控制算法也比较复杂。
Conventional video encoder needs large amount of extra memory and circuit to implement the motion-detection function, and has a large computational complexity on rate-control function.
传统视频编码器需要增加大量额外的存储器和电路完成以运动检测功能，且码率控制算法也比较复杂。
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