The soft core can adopt interpolation technique to process image, can make use of VHDL to design FPGA, and can also use wavelet transform to improve the arithmetic of image process.
该软核采用插值算法进行图像处理，利用硬件编程语言VHDL对FPGA进行设计，也可利用小波变换方法对图像处理算法进一步优化。
We take the Full Adder as an example to introduce the use of VHDL in the design of digital system, the experiment of digital circuit and the teaching.
本文以全加器为例介绍其在数字系统设计和数字电路实验及教学中的应用。
This article studied how to design a counter based on VHDL which will be applied in drip-irrigation controller.
本文针对VHDL在滴灌控制器的定时器芯片的设计展开研究。
The LOP circuit module is described in gate level with VHDL, which has passed the logic simulation and verification. It is applied to the design of floating-point adder.
LOP电路设计采用VHDL语言门级描述，已通过逻辑仿真验证，并在浮点加法器的设计中得到应用。
In the design, the median filter is chose to process images. The key algorithm is achieved through the VHDL.
在设计时，选用中值滤波算法对图像进行处理，核心算法的实现则通过VHDL语言实现的。
VHDL, however, can make effective description of the digital system and enable logical synthesis to produce high design density.
VHDL语言能方便地进行数字系统描述，而且能使逻辑综合产生更大的设计密度。
Use CPLD and VHDL together to design the time sequence driving circuit for a kind of linear CCD.
利用CPLD复杂可编程逻辑器件，结合VHDL硬件描述语言，设计了一种线阵CCD驱动时序电路。
A design method by usage of finite state machine and VHDL hardware description language to develop the program is adopted, then it is simulated and downloaded on the EDA software platform.
采用有限状态机设计方法，使用VHDL硬件描述语言编程，并在EDA工具软件平台上进行了仿真和下载。
Based on a classical example, we specify how. to begin a Top -down design with VHDL. Also, we point out that how to incorporate VHDL into a being used EDA environment.
结合一个典型例子，说明如何采用VHDL开始一个自顶向下的设计，指出如何在现有的环境中有效开发VHDL的应用。
To design the timing circuit of LCD using VHDL.
并使用VHDL语言设计LCD驱动时序电路。
In this paper, the optimization method was used to design the interface circuit, and use VHDL description to design low voltage digital delay timer.
在电路设计过程中，对后级接口电路进行了最优化设计，采用VHDL描述的方式实现了低压数字延时电路模块的设计。
I graduated from the core task is to design: FPGA to create a VHDL-based language of the digital voltmeter.
我的毕业设计的核心任务是：采用FPGA来制作一个基于VHDL语言编写的数字电压表。
This paper mainly introduces the common principles of RISC microprocessors design and the internal structure, and the way to program the VHDL software of hardwired control unit.
文中主要介绍了RISC微处理器设计遵循的一般原则，RISC模型机的内部结构设计原理及硬联线控制器的VHDL软件设计方法。
The control programme describes the circuit behavior in VHDL by employing the modularized design method and USES state machines to synchronize the control signals.
控制程序采用模块化的设计方法，用VHDL实现电路行为的描述，采用状态机控制整个流程，实现对各路控制信号的同步。
The VHDL design organization and data types are described. Applications of VHDL to VLSI design are discussed.
概要地介绍了VHDL的设计组织和数据类型，并对VHDL的特点及其在VLSI设计中的应用要点做了一些探讨。
VHDL is very suitable to the design of programmable logic devices.
VHDL非常适用于可编程逻辑器件的应用设计。
VHDL language is used to describe, define the base pins, add read-write and compile schematics, create the JED files, and download JED files into CPLD to complete the design.
并用VHDL语言描述逻辑、定义管脚、增加读写、编译原理图、产生JED文件，将JED文件存入可编程逻辑器件以完成编程设计。
As a result, the combination of VHDL and the FPGA can greatly improve the efficiency and agility of design, shorten the cycle of developing, accelerate the products to come into the market.
因而，VHDL和FPGA器件结合，能大大提高设计的灵活性与效率，缩短了产品开发的周期，加快产品上市时间。
Through a simple and complete and typical 12-band counter VHDL design examples, to make preliminary understanding of VHDL expression and the resulting VHDL language phenomenon and statement rules.
通过一个简单完整而典型的12进制计数器的VHDL设计实例，来使大家初步了解用VHDL表达以及由此而引出的VHDL语言现象和语句规则。
Therefore, it is essential to study how to predigest actual circuit and achieve optimized design in VHDL.
因此，有必要深入讨论在VHDL设计设计、应用中如何简化实际电路，达到优化设计的要求。
From a point of view of system level design, we introduce the design style of applying VHDL to hardware system design.
本文从系统设计的角度介绍了应用VHDL进行硬件系统设计的设计风格。
However, using VHDL could design the digital password locks which consistent with all kinds of requirements and more rapid and flexible than other methods, to achieve highly automated design process.
而用VHDL可以更加快速、灵活地设计出符合各种要求的数字密码锁优于其他设计方法使设计过程达到高度自动化。
By using VHDL as design language and according to the principle of VGA, a controller of VGA display system based on FPGA is designed.
依据VGA显示原理，利用VHDL作为设计语言，设计了一种基于现场可编程器件FPGA的VGA多图像控制器，并在硬件平台上实现设计目标。
This thesis using FPGA devices and VHDL hardware description language to completed the design and realization of USB equipment controller.
本文主要通过FPGA器件，利用HDL硬件描述语言，初步完成了USB设备控制器的设计和实现。
This thesis using FPGA devices and VHDL hardware description language to completed the design and realization of USB equipment controller.
本文主要通过FPGA器件，利用HDL硬件描述语言，初步完成了USB设备控制器的设计和实现。
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