VHDL hardware description language based, a very good book, time to take a look!
VHDL硬件描述语言基础，非常好的一本书，有时间不妨看看！
The serial communication interface chip design was realized by application of schematic diagram and VHDL language.
采用自顶向下的设计方法，用原理图和VHDL语言这两种输入对串行通信接口芯片进行设计。
In this paper, the VHDL high level abstract model is outlined, and the language basics in VHDL which can be used to support and represent this model are introduced.
本文概述了VHDL的高级抽象模型，并对VHDL中支持和表示此模型的语言基础作了简介。
Having analyzed the difference of the two languages, this paper provides a method of translating C language into VHDL language, and the method is implemented.
文章通过分析两种语言的区别，提出并实现了适于表达C语言描述内容的VHDL结构形式，并对几种C语言结构提出合理的转换方案。
The program is compiled with VHDL(hardware description language).
试验程序由VHDL硬件描述语言编写。
The logic synthesis of VHDL language is a method that the description of higher abstract hierarchy is shifted to lower one automatically.
VHDL语言的逻辑综合就是将较高抽象层次的描述自动转换到较低抽象层次描述的一种方法。
The paper studies the hardware of the interface circuit and how to control the sweep fingerprint sensor to complete the task of high quality fingerprint gathering with hardware language VHDL.
重点研究接口电路的硬件组成和如何采用硬件语言VHDL编程控制滑动式指纹传感器以完成高质量的指纹采集工作。
Then data gained by simulation through the hardware language VHDL were listed out, which proved the validity of the conversion on hardware system.
并列出了一组由VHDL硬件语言模拟得到的转化结果的数据，来证实能在硬件上转化的正确性；
On the base of analyzing the structure and the design difficulty of the asymmetric synchronous FIFO, an asymmetric synchronous FIFO is achieved by using VHDL language and FPGA in this paper.
本文在分析了非对称同步fifo的结构特点及其设计难点的基础上，采用VHDL描述语言，并结合FPGA，实现了一种非对称同步fifo的设计。
Summarized the concurrent statements and sequential statements of VHDL language, and described their types and the characteristic.
简单概述了VHDL语言的并行语句和顺序语句，描述了其种类和特点。
VHDL can provide high level language structure, describe large scale circuit conveniently and complete design rapidly.
VHDL能提供高级语言结构，方便地描述大型电路，快速地完成设计。
The paper proposes a mew method for testing combinational digital circuit which is based on the VHDL language.
本文提出了一种新的基于VHDL语言的组合数字电路测试码自动生成方法。
The reference CPU core use VHDL language input, make logic synthesis and simulation through the popular EDA tools, then it was implemented in FPGA.
CPU内核采用VHDL硬件描述语言输入，结合流行的EDA设计、综合、仿真工具，最后在FPGA上实现该内核。
The paper introduce the technique of EDA, on it, logical function has been stigmatized by VHDL language, the design of hardware become more flexible.
本文引入了电子设计自动化(EDA)技术，在EDA平台上使用硬件描述语言(VHDL)完成对硬件功能描述，使硬件设计更加灵活。
The paper proposes a new method for Hanming encoder and Hanming decoder which is based on the VHDL language.
文章提出了一种新的基于VHDL语言的汉明码的编码和译码的实现方法。
And the programmable language is used VHDL.
在设计中所用编程语言是VHDL。
In this thesis, VHDL hardware description language was applied to program FPGA to realize high accurate pulse generator.
本文采用VHDL硬件描述语言对FPGA编程实现了高精度脉冲发生器。
As a hardware description language, VHDL has being used more and more by electronic circuit designers.
VHDL作为一种电路硬件描述语言，目前正在被越来越多的电子技术设计人员所应用。
The paper introduces the giving rise to and characteristic and the basic grammar structure of programming of VHDL language.
本文介绍了VHDL语言的产生、特点和程序设计的基本语法结构。
VHDL is a special hardware language.
VHDL是一种特殊的硬件描述语言。
This paper mainly talks about designing the protocol layer of USB2.0 with the programmable logical device as the carrier through the VHDL language.
本文在此主要通过VHDL语言，利用可编程逻辑器件作为载体来设计usb2.0的协议处理层模块。
RISC microprocessor is developed by using modular design method and VHDL language based on FPGA and EDA technology.
基于FPGA和电子设计自动化技术。采用模块化设计的方法和VHDL语言，设计一个基于FPGA的RISC微处理器。
It is realized with VHDL language.
最后用VHDL语言进行实现。
VHDL language is the important tool of electronic design, and data object is one of essential language factors.
VHDL语言是现代电子设计的重要工具，数据对象是其中的重要语言要素。
Using VHDL language 4* 4 keyboard scanning procedures, tested, safe to use.
说明：利用VHDL语言编写的4*4键盘扫描程序，经过测试，可以放心使用。
But the VHDL language simplifies the entire system significantly and improves the overall functions and reliability.
基于VHDL语言，将使整个系统大大简化，提高整体的性能和可靠性。
This system is based on VHDL language, designed nine demonstrational experiments.
设计了以VHDL编程语言为基础，设计了九个单元演示实验。
A full-function control system of counting is designed on a PLD device using VHDL language. It can measure and display the length and send out a control signal according to the set value.
利用VHDL语言在PLD器件上设计全功能计数控制装置，使其实现计量、显示长度并根据预置数输出控制信号的功能。
The software design for MSP430 in C language is given and CPLD in VHDL language is developed.
完成了MSP430单片机C语言控制板的软件设计，并应用VHDL语言对硬件CPLD进行了开发。
All digital logic functions are used in the CPLD device VHDL language.
所有数字逻辑功能都在CPLD器件上用VHDL语言实现。
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