It is an overall system verification that no individual load is above a threshold level of specific antibiotics.
这是一个整体系统的核查，没有任何个人负荷阈值以上水平的抗生素。
This level is sometimes called fire and forget because the message is sent to its destination without verification of receipt.
这一级有时又称作 “发后即忘”，原因是向目的地发送消息后并不验证消息的接收。
Some countries have initiated informal expert-level discussions on FMCT to discuss issues such as definitions and verification.
一些国家就“禁产条约”问题，比如相关的“定义”和“核查”问题，发起了非正式的专家讨论。
This case study evaluated the feasibility of using ClearQuest test management to track the function verification test progress at the release, solution, or line item level.
这个案例研究对利用ClearQuest测试管理在发布，解决方案，或者排列项层次跟踪它们的功能验证测试进展的可行性进行了评估。
The scope could be a given level or type of test, such as Functional Verification test (FVT) or System Verification test (SVT).
范围可以是一个给定的测试级别或测试类型，例如功能验证测试(FVT)或系统验证测试(SVT)。
A really restrictive schema combined with code-level verification of the remaining data may leave you with no room to maneuver.
一个结合了对剩余数据进行代码级验证的真正严格的模式也许不会留下可操纵的空间。
A strategy we used to pursue the "test code early and often" best practice was to involve developers in both feature verification and product verification (system-level) testing.
我们曾经提到的策略“尽早并经常地测试代码”是一项为开发者提出的最佳实践，无论是在特性验证还是产品的验证(系统级)测试中。
In order to achieve optimum results at this level of detail, the Function Verification Test team can benefit from some of the more detailed UML diagrams, such as the class and sequence diagrams.
为了在这个粒度达到最佳的结果，功能验证测试团队可以从一些更详细的uml图中获取利益，比如类和序列图。
At a high level it’ll provide simplified discovery, application, update and AIX configuration-verification properties across multiple systems.
简单地说，它将跨多个系统提供简化的发现、应用、更新和AIX 配置确认属性。
Devise a flexible BIOS structure to build "Longtuim S2" software validation platform with the help of the environment for the module level verification.
基于模块级验证的环境，设计了一种活芯BIOS结构，建立了“龙腾s2”的软件验证平台。
The LOP circuit module is described in gate level with VHDL, which has passed the logic simulation and verification. It is applied to the design of floating-point adder.
LOP电路设计采用VHDL语言门级描述，已通过逻辑仿真验证，并在浮点加法器的设计中得到应用。
This paper proposes and implements a novel verification and RTL-Level bug locating method for microprocessors.
本文提出并实现了一种新的基于指令分解的微处理器验证与RTL级错误定位方法。
Finally, scheduling and precautions for verification tests of the calibration pressure of main steam safety valve under 83 % FP power level are given.
最后，给出在83 %FP以下的功率运行下进行主蒸汽安全阀定值校验试验的窗口安排与注意事项。
Application of these pressure verification methods has increased interpretation level and has ensured reliability of interpretation results.
通过应用压力验证方法，提高了解释质量，确保了解释成果的可靠性。
Thus management level and comprehensive strength of Power Verification Platform management System are enhanced to a great extent.
使得电力企业的管理水平和综合实力得到了大幅度的提高。
The results show that the adaptive PMC model is applicable, the distributed system level diagnosis algorithm is proper, and the applications of diagnosis and verification are reliable and practicable.
结果表明：改进的PMC模型适用，所提出的分布式系统故障诊断算法正确，故障诊断与验证应用程序可靠、实用。
A design flow based on mixed-signal simulation is proposed. The top-down design method indicates simulation and verification at each level of the mixed signal system design.
介绍了数模混合信号仿真的设计流程，说明了一种在混合设计的各个层次上对系统进行仿真验证的自上而下的设计方法。
RTL(register transfer level) functional verification system for package assembly function in IPOA application is illustrated in this paper.
介绍一种对IPOA应用中的组包功能进行RTL功能验证的系统。
The concrete fusion process, such as activity level measurement, coefficient combination methods, consistency verification and decomposition depth are discussed in detail.
具体讨论了变换系数活跃度测量、变换系数融合方法、变换系数验证、帧变换分解深度等问题。
Verification is the bottleneck of more and more complex integrated circuit designs, and doing verification directly on register transfer level (RTL) is a promising solution.
验证是当前越来越复杂的集成电路设计中的瓶颈，在寄存器传输级（RTL）直接做验证是目前比较有效的一种途径。
With the increase of manufacturing level and design scale, verification has become on of the major bottlenecks of IC design.
随着IC制造水平的提升和设计规模的增大，验证成为了IC设计的主要瓶颈之一。
Domain method is adopted to measure block level verification quality, domain coverage metrics can find more verification holes, compared with line and path coverage metrics.
采用域覆盖率衡量模块级验证工作的充分型，结果表明这种覆盖率相对于行覆盖率和路径覆盖率更能准确衡量验证工作的充分性和发现验证漏洞；
On the system verification platform, the function simulation in system level about the pseudo LRU mechanism and MESI protocol is taken, and the results conform to the original intension of our design.
此外，为了验证LRU算法和一致性协议，我们在验证平台上做了相关的系统级功能模拟，逻辑模拟结果和设计初衷是吻合的。
Therefore this thesis studies on text-independent speaker verification and channel robustness methods on feature level, model level and system level.
因此本文着重研究了与文本无关的说话人确认系统，从参数级、模型级、系统级三个方面加强了系统的信道鲁棒性。
Implementation verification shows that the planning and implementation reasonable, and the results reaches the intended targets, improves the enterprise's management level.
实施验证表明，所提出的规划和方案合理、适应企业的客观情况，达成了预定的实施目标，提升了企业的管理水平。
The calculation and its verification show that the calculated processes of tidal level and current fairly well coincide with field data, and the flow field of calculation is reasonable.
实例计算和验证表明：计算的潮位和潮流过程与实测过程吻合较好，计算的流场合理。
It is important to transform machine code to high level language program in program analysis, verification, maintenance and reformation.
将计算机可执行的机器代码转换为高级语言程序，这对于分析、理解、测试、验证、移植和改造程序非常重要。
The verification automaton and the algorithm for abstracting critical path are proposed to verify high level synthesis process automatically.
为了便于自动验证高层综合过程，给出了验证自动机模型。
Conclusion BNP level is a sensitive index for verification of ventricle function.
结论BNP是反映心室功能的灵敏指标。
Conclusion BNP level is a sensitive index for verification of ventricle function.
结论BNP是反映心室功能的灵敏指标。
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