The result register will be non-zero (or, true, all bits set to one) if the previous test for zero was true.
如果之前是否为零的测试的结果为真，那么结果寄存器将是非0(为真，所有位均被置1)。
Similar to the previous processor , this one is made on 65 Nm process and support EM64T (for 64 bits instructions ), INTEL VT for virtualization or instructions SSSE3 ( SSE3 Supplemental ).
类似以前的处理器，这是一对65纳米工艺，支持64位（ 64位指令），英特尔虚拟技术，为虚拟或指示ssse3 （sse3的补充）。
However, although in this case the correction bits allowed some recovery from a previous very large noise event, these correction bits themselves are prone to noise.
然而，虽然在这种情况下允许校正位从前面的很大的噪声事件进行一定的恢复，但是这些校正位本身易于受噪声的影响。
However, although in this case the correction bits allowed some recovery from a previous very large noise event, these correction bits themselves are prone to noise.
然而，虽然在这种情况下允许校正位从前面的很大的噪声事件进行一定的恢复，但是这些校正位本身易于受噪声的影响。
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