In this dissertation, some beneficial researches on test pattern generation for asynchronous circuits are taken.
本文还针对异步时序电路测试生成问题进行了有益的研究。
This paper studies the crosstalk fault and its methods of test pattern generation in high-speed interconnect circuits.
本论文针对高速互连电路串扰型故障及测试生成方法进行研究。
The paper proposes controlling input values tracing algorithm and test derivation algorithm based on test pattern generation using satisfiability.
以组合电路的满足性测试生成算法为基础，提出了控制输入跟踪算法和测试衍生算法。
In order to reduce the storage requirements for the test patterns, a vertical and horizontal test data compression BIST scheme based on the test pattern generation of twisted-ring counter is proposed.
为了减少测试向量的存储需求，提出一种基于扭环计数器作为测试向量产生器的横向和竖向测试数据压缩的BIST方案。
In order to reduce the storage requirements for the test patterns, a vertical and horizontal test data compression BIST scheme based on the test pattern generation of twisted-ring counter is proposed.
为了减少测试向量的存储需求，提出一种基于扭环计数器作为测试向量产生器的横向和竖向测试数据压缩的BIST方案。
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