The test paper generation is a constrained multi-object optimization problem.
组卷问题是一个多约束多目标组合优化问题。
Automatic test paper generation is a NP hard problem while restrictions exist.
试题库自动组卷问题是一个NP难题。
This paper introduces a test question database and test paper generation system developed by the author.
介绍了作者研制的“电路”试题库及试卷生成系统。
Online examination system is composed by the modules from the test paper generation, distribution, online exams, to the automatic grading.
在线考试模块实现了试卷生成、发放、在线考试、自动阅卷等功能；
The design also construct the function mode from scientific and pragmatic aspect, including test question input, item pool management, test paper generation etc.
其次介绍了各个模块功能的具体实现，包括：题库权限管理、手动出卷、自动出卷等。
This paper introduces database structure, test paper control parameters and implementation of the test paper generation strategy based on bilateral table of detailed catalogue.
文章介绍了基于命题双向细目表组卷策略的数据库结构、组卷控制参数及具体实现方法。
This paper presents the status-quo of wind power generation, performance requirements for the cable for wind power generation and a special test-torsion test.
本文介绍了风力发电的现状、风力发电用电缆的性能要求及一项特殊试验——抗扭转试验。
Using Binary Decision Diagrams, this paper proposes a test generation method for functional level digital circuits.
本文利用二叉判定图提出了对功能级数字电路的一种测试产生方法。
In addition, the detailed analysis of some frequently used memory test algorithms and brief analysis of some test generation algorithms for VLSI are also included in this paper.
另外本文还比较详细的分析比较了常用的存储器测试算法，简要分析了VLSI测试生成算法。
The problems of optimal test point selection and optimal diagnosis tree generation are discussed in this paper.
文中讨论了基于相关性矩阵的测试点优化方法和故障诊断树的生成方法。
This paper realizes the automatic generation of the test case in the structure coverage test, which takes use of the iterative relaxation method as key algorithm.
利用迭代松弛法作为核心算法实现了结构覆盖测试用例的自动生成。
This paper presents an efficient sequential circuit automatic test generation algorithm. The algorithm is based on self - adapting algorithm and USES a seventeen - valued logic model.
本文提出了一种高效的时序电路测试生成算法，该算法是建立在自适应算法的基础上，并使用了十七值逻辑模型。
This paper presents an interoperability test generation method based on the formal model, Communicating Multiport Finite State Machines.
文章提出了一种基于通信多端口有限状态机模型的协议互操作性测试生成方法。
This paper describes state transition fault and collapsing of test generation basis of the character of fixed fault.
详细分析了固定故障所反映出的状态变换特征，提出状态变换故障模型以及相对应的测试生成压缩方法；
Besides fault collapsing, this paper also proposes some techniques, such as code collapsing, change of the ending rules to optimizing the test generation algorithm.
结合故障精简，本文通过编码压缩、变化终止规则等方法进一步优化了全速电流测试方法的测试产生算法。
This paper proposes a new algorithm for transient current test (IDDT) generation.
本文针对瞬态电流测试提出了一种测试产生算法。
This paper studies the crosstalk fault and its methods of test pattern generation in high-speed interconnect circuits.
本论文针对高速互连电路串扰型故障及测试生成方法进行研究。
Based on the model, this paper presents a testing requirement reduction method to generate the reduced testing requirement set, which is the basis of test suite generation, reduction and optimization.
基于此模型，提出一种测试需求约简方法，可以获得精简测试需求集，作为测试用例集生成和约简的基础，从而实现测试用例集优化。
This paper proposed a new algorithm for transient current test(IDDT) generation.
针对瞬态电流测试提出了一种测试产生算法。
This paper proposes a generation method of path coverage test based on Gene Expression Programming(GEP) algorithm, compiler technology and Virtual Machine(VM).
提出一种基于基因表达式编程（GEP）算法、编译器技术、虚拟机技术的路径覆盖测试用例生成方法。
This paper propose a functional fault for delay faults in combinational circuits and describe a functional test generation procedure based on this model.
提出一种用于测试组合电路中延迟故障的新功能故障模型，讨论该模型的功能测试生成。
This paper presents a high speed test generation method specifically for upper large scale combination circuit (ULSCC) and full scan designed circuit.
针对特大规模组合电路和全扫描设计电路提出了一种高速测试生成方法。
This paper presents an algorithm of test patterns generation for digital circuits which is called the principal path sensitization method.
本文提出了产生数字电路测试码的一种算法——主路径敏化法。
The paper proposes controlling input values tracing algorithm and test derivation algorithm based on test pattern generation using satisfiability.
以组合电路的满足性测试生成算法为基础，提出了控制输入跟踪算法和测试衍生算法。
This paper proposes a new algorithm for transient current test (IDDT) generation for delay fault.
这里提出了一种关于延时故障的测试产生算法。
This paper focuses on automatic test data generation for path testing using genetic algorithms.
本文主要研究的是路径测试数据的自动生成方法。
This paper studies a test vector generation algorithm for digital circuits which can locate the component faults.
结合一个实际电路，研究了一种可把数字电路故障定位到器件级的测试向量生成算法。
This paper explores an approach to automatic generation of integration test sequences based on UML sequence diagrams.
该文研究了基于UML时序图的集成测试序列自动生成方法。
This paper explores an approach to automatic generation of integration test sequences based on UML sequence diagrams.
该文研究了基于UML时序图的集成测试序列自动生成方法。
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