A test chip is designed and manufactured in a semiconductor foundry to test the layout dependency of the electroplating process.
本文设计了一款测试芯片并在一家半导体厂加工制造。
Part of the problem is that the chip is just too intelligent - rather than a standard digital pulse it produces an analogue output that flummoxes the standard software used to test chips.
其中一个问题是芯片太“过于智能”了——与普通芯片的数字脉冲输出不同，它的输出是模拟信号，因此用于数字芯片的测试程序被它干扰了。
Earlier this week, Intel, the world's largest chip maker, said it would lay off at least 5, 000 people and close some test and manufacturing plants to deal with vanishing demand for its products.
本周早先时候，世界最大的芯片制造商intel表示由于产品需求巨大降低，公司会裁员至少5000人，并且关闭旗下的测试和生产厂。
Moreover, a scan test circuit was proposed. This circuit can implement scan test and high speed build in self test (BIST) for IP core chip tests.
另外，本文还针对IP核投片测试提出一种扫描测试电路结构，能够实现测试芯片的扫描测试和高速内建自测试(BIST)。
The paper proposed a new Selected Variable-length Input Coding (SVIC) for System on Chip (SOC) test data compression.
本文针对SOC测试数据压缩，提出了一种新的可挑选变长输入编码(SVIC)方案。
This system is composed of a programmable power source, a test circuit, a signal sampler, a signal conditioner and a Single Chip Microcomputer.
测试系统包括程控电源、测试回路、信号采集、调理电路和单片机数据采集接口电路等部分。
Because this method doesn't use memory to store the test patterns, it can save certain area of the chip.
该方法由于没有采用存储器存储测试模板，所以可以节省一定的芯片面积。
This paper describes an approach to instruction system-based on behavioral functional level test of MB86901 SPARC RISC chip.
本文提出了一种基于指令系统的MB86901SPARCRISC芯片的行为功能级测试方法。
This paper focuses on the JTAG ideas and technical characteristics and summarizes the JTAG usage in chip function test, system diagnosis, simulation, performance analysis and conduction test.
文中介绍JTAG边界扫描的概念、技术特点，以及在芯片功能测试、系统诊断、仿真、性能分析和导通测试方面的应用。
Design for test is an important process in the chip design nowadays, testability design of wireless chip needs a much higher requirement of test technology.
可测试性设计是现代芯片设计中的关键环节，针对无线接入芯片的可测试性设计对测试技术有更高的要求。
Later, in the United States, some people would put a real chip on their shoulder as a test.
后来，在美国，一些人真的在肩膀上放上碎片作为测试。
Introduce the system constitution, test, selecting principle and software function and design key point of automatic test and selecting machine of chip capacitor.
介绍了片式电容器自动测试分选机的系统组成、测试和分选原理及软件功能及设计要点。
The third chapter gives proper means of getting valid chip: sufficient verification in design phase and full test in manufacture phase.
第三章的主要内容是保证芯片的正确性的主要方法：要在设计阶段进行充分验证，在制造阶段进行充分测试。
With the establishing of verification and test platform for SDH chip, We realize the function simulation, timing simulation and performance test of the IP soft-core.
通过建立SDH芯片验证平台和SDH芯片测试平台，实现IP软核的功能仿真、时序仿真和芯片性能测试。
The top metal test pad, special test mode and BIST are adopted in the IC circuits to solve the IC test problem about the chip function test and electric character test.
通过添加测试引脚、设计专用测试模式，内建自测试等方法有效的解决了该芯片电路的功能测试和电气性能测试。
Test results show that the chip can meet or exceed all function and performance criteria.
芯片的实际测量结果表明芯片的各项功能及性能指标都达到或超过设计目标。
A large number of various embedded memory are integrated in digital chips, as the constraints of chip ports, direct test of these memories is very difficult.
各种类型的嵌入式存储器大量集成于数字芯片中，由于芯片端口的限制，直接测试这些存储器非常困难。
GPIB controller is widely used in automatic test field, for it's the core chip in making up the test system.
GPIB控制器芯片是组建自动测试系统的核心，在测试领域应用广泛。
As the integrated circuit design has stepped into the deep ultra-submicron stage, the complexity of the circuit increases continually, chip test faces very huge challenge.
随着集成电路设计进入超深亚微米阶段，电路复杂度不断提高，芯片测试面临着巨大的挑战。
The design of chip test controller of a security chip and design for test of corresponding cores are discussed in detail.
从可测性设计角度讨论了信息安全处理芯片的芯片级测试控制器的设计以及相应核的可测性设计。
Establishing an unite interface of chip test and debug which embodies the boundary scan and complements the full scan.
建立一个统一的芯片测试和芯片诊断调试接口，形成以边界扫描链为主体，全扫描链为补充的芯片测试机制。
Joint test Action Group designed a common chip boundary-scan structure and test access port criterion which is called JTAG standard to support testing on-board chip or logic.
为支持板上芯片或逻辑的测试，联合测试行动小组专门设计和定义了一种通用的芯片边界扫描结构及其测试访问端口规范，称为JTAG标准。
In this paper, a method of serial communication between PC and 80c196kc Single-chip-computer applied to the test system of Greensand quality is introduced.
介绍了一种湿型砂质量测试系统中PC机和80c196 K C单片机之间串行通信的实现方法。
The wireless remote test and control system of temperature which consists of gateway, wireless communicating module, test and control circuit controlled by single chip microcomputer.
文章介绍了一种由网关、无线通信模块、单片机温度测控单元构成的多点温度无线远程测控系统。
This paper introduces the principles and methods of the test and diagnosis of digital IC, using 8098 Single chip Computer and other interface Chips.
介绍了利用8098单片机和其它接口芯片，实现对数字集成电路进行测试诊断的原理和方法。
It can satisfy the requirement of digital plugboard test and carry out the plugboards test to chip level. Thus it has wide application potential.
它满足雷达数字插件板测试需求，能实现芯片级测试，具有广阔的应用前景。
Invented the automatic test for powder technology and automatic pick chip technology, make product color consistency.
创造性的发明自动测试补粉技术和自动挑晶技术。
The test control unit adopted SOC single chip C8051F040 processor which contained CAN controller to test and control its electric equipments.
测控单元均采用带CAN控制器的SOC单片机C8051F040处理器，测量和控制其电气设备。
First, a special instrument to test the analog-control board, single-chip board and angle-measure board in the high precision servo turntable system is designed.
首先，针对某型精密伺服转台系统中三块电路板（模拟控制板、单片机板和测角控制板）设计了专门的电路板测试仪。
First, a special instrument to test the analog-control board, single-chip board and angle-measure board in the high precision servo turntable system is designed.
首先，针对某型精密伺服转台系统中三块电路板（模拟控制板、单片机板和测角控制板）设计了专门的电路板测试仪。
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