Early in the morning, after all but one engineer had gone home, the engineer finally reproduced a system reset on the replica.
某天早上，其他工程师都回家了，只剩下一个人在工作，他终于在模型上重现了重启的故障。
Warning: a fatal error has caused system reset!
警告：致命错误导致系统重启动！
Fatal error caused a system reset: Please check the system event log for details.
致命错误导致系统重设：有关详情，请检查系统事件记录。
Some Key points in system realization, such as the system bus structure, the selection of DSP chips and the process of system reset, were discussed in detail.
提出了一种实时图像信息处理系统模块化可扩展的多总线结构，详细论述了其系统总线结构、DSP芯片选型及系统复位流程等系统实现中的关键问题。
It is mainly composed of DMA controller (82c37), interrupt controller (82c59), programmable interval timers (82c54), DRAM refresh control, wait state generator and system reset logic.
其内部主要由DMA控制器(82c37)、中断控制器(82c59)、可编程间隔计时器(82c54)，DRAM刷新控制器，等待状态产生器，系统重置电路组成。
It is mainly composed of DMA controller (82c37), interrupt controller (82c59), programmable interval timers (82c54), DRAM refresh control, wait state generator and system reset logic.
其内部主要由DMA控制器(82c37)、中断控制器(82c59)、可编程间隔计时器(82c54)，DRAM刷新控制器，等待状态产生器，系统重置电路组成。
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