Therefore, the system needs a synchronous clock.
因此，系统需要一个同步时钟。
NRZ code doesn't contain synchronous clock frequency.
它本身不含有位同步时钟分量。
The design of a synchronous clock PC card is introduced.
介绍了基于GPS的时钟同步PC卡的研制及其应用。
The structure and function of GPS synchronous clock device are introduced.
介绍了GPS同步时钟装置的结构及其功能。
The GPS synchronous clock and the conversion devices are linked up with RS-485 bus.
本系统主要包括GPS同步时钟和通信协议转换模块，二者之间通过RS- 485总线进行连接。
The design and application of the PC card of GPS based synchronous clock were introduced.
介绍了基于GPS的时钟同步pc卡的设计与应用。
This paper introduces a kind of GPS synchronous clock on the basis of DS80C320 microcontroller.
介绍一种基于DS80C 32 0单片机进行二次开发的GPS同步时钟。
The invention relates to a method and device for generating synchronous clock signals for writing operation in disk drive.
本发明涉及在磁盘驱动器中产生用于写操作的同步时钟信号的方法和装置。
Bit synchronous clock recover circuit is the key part of the communication system, it can exactly recover the synchronous signal from input data stream.
位同步时钟信号的提取是通信系统中的关键部分，应用数字锁相环可以准确地从输入码流中提取出位同步信号。
A kind of GPS satellite synchronous clock based on the DS80C320 High-speed SCM is recommended in the following thesis, to solve problem mentioned above.
针对这种情况，本文设计了一种基于DS80C 320高速单片机的GPS卫星同步时钟。
The invention achieves the functions of software for receiving and transmitting a precision synchronous clock protocol message and adjusting and calibrating a system clock.
本发明实现了软件收发精密同步时钟协议报文、调整、校对系统时钟功能。
Mode of serial port pair: synchronous clock device through the serial port read per second pair a serial output time information, serial port and RS232 interface and RS422 interface.
串行口对时方式：装置通过串行口读取同步时钟每秒一次的串行输出的时间信息对时，串行口又分为rs232接口和RS422接口方式。
The clock signal provided by Global Positioning system GPS is widely used as a synchronous clock in broadcasting television system and electric power system and the display of time in public.
GPS卫星同步时钟广泛用作广播电视、电力等系统的同步时钟及车站、机场等公共场所的时间显示。
First, the usual RISC is synchronous, supplied a clock single by a clock element.
首先，平常的RISC计算机是同步的，由一个时钟提供一个同步的信号。
In binary synchronous communication, the use of clock pulses to control synchronization of data and control characters.
在二进制位同步通信中，使用时钟脉冲来控制数据和控制字符的同步。
In designing synchronous digital integrated circuits, the design of clock tree is an important component, which may greatly affect the performance and reliability of the system.
时钟树的设计是同步数字集成电路设计中的一个重要部分，对系统的性能和可靠性有很大影响。
This article lays its stress on the main testing methods of the precision of master clock and the relevant synchronous equipment.
论文着重介绍了主时钟以及相关同步设备精度的主要测试方法。
Compared with conventional circuits, the recovered parallel data is bit-synchronous, and the reference clock is avoided.
与传统并行数据恢复电路相比，该电路不需要本地参考时钟，并且恢复出的并行数据是位同步的。
The parallel loading of the flip-flop can be synchronous (i. e., occurs with the clock pulse) or asynchronous (independent of the clock pulse) depending on the design of the shift register.
触发器的并行加载可以是同步的(即在时钟脉冲到达时发生)或异步的(不依赖于时钟)，这取决于移位寄存器的设计。
This Design Idea describes how to implement a common clock (synchronous version) for an FPGA-based FIFO for data-width conversion with different-width read and write data ports.
本设计方案描述了为不同宽度读写数据端口的数据宽度转换，怎样基于FPGA的FIFO实现共有时钟(同步)。
The interface circuit also can produce synchronous, vanished and ensconced, digital clock signal and realize remote control, displaying on screen.
同时产生同步、消隐、数据时钟等信号以及实现遥控、屏幕显示的控制功能。
The clock signal provided by Global Positioning System(GPS)is widely used in electric power system for relay protection, SOE (Sequence of Events), fault locating, synchronous sampling and so on.
GPS同步时钟信号已在电力系统的继电保护、事件顺序记录、故障测距、同步采样等诸多领域获得重要运用。
Using the clock synchronization, synchronous sampling could be realized on an asynchronous control network.
为了能在异步控制网络上实现采样同步，可采用时钟同步方法。
So the synchronous parellel data can be gotten if the rising of sample clock is set at the middle of the stable time of all deserialized data.
同时发现各线路间传输延迟有半个周期的不一致，因此在接收端应把采样时钟上升沿调整在所有解出数据都稳定的时刻。
This thesis selects model GN-80 GPS receiver and SCM to design the sampling device. The high accurate time service is used to synchronize the sample clock signal to realize synchronous sampling.
选用GN-80型GPS接收设备和单片微机进行电力系统状态变量同步采集终端的硬件设计，利用GPS的精确授时作为其同步时钟控制采样脉冲来实现同步采样。
Selecting one clock scheme is the basis of designing synchronous systems .
选择时钟方案是同步时序集成电路设计的前提。
Thirdly, this thesis sets forth a routing security protocol of the wireless sensor networks, and establishes a special clock synchronous protocol.
第三，本论文设计了轻量散投的无线传感器网络安全路由协议；
Thirdly, this thesis sets forth a routing security protocol of the wireless sensor networks, and establishes a special clock synchronous protocol.
第三，本论文设计了轻量散投的无线传感器网络安全路由协议；
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