Along with the SDH's extensive applications in the telecommunications network, people now pay more and more attention to the SDH's synchronization and timing.
随着SDH在通信网中的大量使用，SDH的同步定时问题引起了人们的广泛关注。
All circuits are designed by HDL and can be intergrated in one CPLD or FPGA chip, used in the frame synchronization and timing of digital communications receiver.
全部电路由硬件描述语言实现，可以集成在一片CPLD或FPGA芯片内部，用于数字通信系统接收端的帧同步和定时。
Wait queues have several USES in the kernel, particularly for interrupt handling, process synchronization, and timing.
等待队列在内核中有很多用途，尤其适合用于中断处理、进程同步及定时。
Wait queues have several USES in the kernel, particularly for interrupt handling, process synchronization, and timing.
等待队列在内核中有很多用途，尤其适合用于中断处理、进程同步及定时。
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