E ink's flexible displays combine a thin stainless steel foil transistor substrate with electronic-ink display material that is coated on a plastic sheet.
EInk的弹性显示器以一薄层不锈钢箔晶体管为基层，结合涂覆电子墨水显示材料的一片塑料基材。
In addition, the buffer layer can mitigate parallel conduction issues between transistor devices and the silicon substrate.
此外，缓冲层可以减少晶体管之间的设备和硅衬底平行的传导问题。
In an embodiment, the device includes a substrate and a transistor formed on the substrate.
在本发明的一具体实施例中，此元件包含一基板和一形成于基板上的晶体管。
A high accuracy temperature sensor is designed by applying the temperature characteristics of a substrate bipolar transistor in CMOS technology.
利用CMOS工艺下衬底型双极晶体管的温度特性，设计了一种精度较高的温度传感器。
Impact ionization arises from a charge injector (25), defining a virtual diode (30) in the substrate (20) of a floating gate charge storage transistor (11).
碰撞电离通过一在一浮栅电荷存储晶体管(11)的衬底(20)中限定一虚拟二极管(30)的电荷注入器(25)而产生。
Further disclosed is a process for fabricating an organic thin-film transistor device, preferably by relative low-temperature sublimation or solution-phase deposition onto a substrate.
进一步公开了优选通过相对低温升华或溶液相沉积到基底上来制造有机薄膜晶体管器件的方法。
A transistor circuit for an array device comprises a plurality of thin film transistors electrically connected in parallel and provided on a common substrate.
一种用于阵列器件的晶体管电路包括并联电连接且设置在同一衬底上的多个薄膜晶体管。
The invention provides a thin film transistor array substrate, a display and a manufacturing method thereof.
本发明提供一种薄膜晶体管阵列基板、显示器及其制造方法。
This invention discloses a semiconductor power device that includes a plurality of power transistor cells surrounded by a trench opened in a semiconductor substrate.
本发明公开一种半导体功率组件，其包括若干功率晶体管记忆胞，该记忆胞被开设于一半导体衬底中的沟槽所围绕。
Thin film transistor array substrate and its producing method are disclosed.
薄膜晶体管阵列基板及其制造方法。
The present invention provides a thin film transistor substrate realizing reduced interlayer short-circuit defects in a capacitor, and a display device having the thin film transistor substrate.
本发明提供了一种薄膜晶体管衬底和具有这种薄膜晶体管衬底的显示装置，这种薄膜晶体管衬底能够减小电容器中的层间短路缺陷。
Said thin-film transistor array substrate comprises a first conductive pattern group having grids of the thin-film transistor and select lines connected with the grids;
一种薄膜晶体管阵列基板，其 包括：第一导电图案组，包括薄膜晶体管的栅极和与该栅极相连的选通线；
In addition, the buffer layer addresses and mitigates lattice mismatches between the film relative to which the transistor is formed and the silicon substrate.
此外，缓冲层地址和缓解晶格薄膜之间的不匹配而相对形成晶体管和硅衬底上。
A first embodiment of the present invention includes an NMOS transistor, a PMOS transistor, and a bipolar transistor formed on different areas of the substrate.
于本发明第一实施例中包括一nmos晶体管、一pmos与一双极晶体管形成于基底的不同区域。
A first embodiment of the present invention includes an NMOS transistor, a PMOS transistor, and a bipolar transistor formed on different areas of the substrate.
于本发明第一实施例中包括一nmos晶体管、一pmos与一双极晶体管形成于基底的不同区域。
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