The implanted dopant has a first dopant profile in the silicon layer.
所注入的掺杂剂在硅层中具有第一掺杂剂分布。
But the design requires that this silicon layer be no more than five nanometres (billionths of a metre) deep.
但此设计要求硅片厚度不超过5纳米(一米的十亿分之一)。
The quality of top silicon layer formed by anneal at low temperature may be better than that at high temperature.
通过低温退火，可以获得质量优于高温退火的顶部硅层。
The method also includes performing a second implant process to implant additional dopant of the second type in the silicon layer.
该方法也包括执行第二注入工艺以便在硅层中注入附加的第二类型掺杂剂。
Part of the silicon layer was masked and dry etched with SF6 gas to allow connection of the current-collector to the outside circuit.
硅片的一部分经掩膜后进行SF6干法刻蚀，从而使集流器能够连接到外电路上。
Base silicon layer - the silicon wafer that is located underneath the insulator layer, which supports the silicon film on top of the wafer.
底部硅层ꢃ-在绝缘层下部的晶圆片，是顶部硅层的基础。
The polycrystalline silicon layer is formed on the oxide layer and used for serving as an upper electrode plate of the high-voltage capacitor.
多晶硅层是形成于氧化层上，用以作为高压电容的上电极板。
The method also includes terminating main etch step when a predefined etch depth of at least 70 percent of thickness into silicon layer is achieved.
当达到对所述硅层的预先设定的蚀刻深度时，终止所述主蚀刻步骤，所述预先设定的蚀刻深度是所述硅层厚度的至少70％；
The high-voltage capacitor structure comprises a two-step diffusion drain electrode structural layer, an oxide layer and a polycrystalline silicon layer.
高压电容结构包括双重扩散漏极结构层、氧化层及多晶硅层。
Finally, the second substrate covered with the second non-crystalline silicon layer is annealed with the laser with the second energy density to form the second polysilicon layer.
最后，以具有第二既定能量密度的激光对表面覆盖有一第二非晶硅层的第二衬底实施退火处理，以形成一第二多晶硅层。
The invention discloses a lower grid electrode-based film transistor which comprises a grid electrode, a grid electrode insulating layer, and a micro-crystallization silicon layer;
本发明公开了一种下栅极式薄膜晶体管，包含栅极、栅极绝缘层以及微结 晶硅层。
The method includes doping a silicon layer with a first type of dopant and performing a first implant process to implant dopant of a second type opposite the first type in the silicon layer.
该方法包括用第一类型掺杂剂掺杂硅层并且执 行第一注入工艺以便在硅层中注入与第一类型相反的第二类型的掺 杂剂。
The perovskite coating is roughly 300 nanometers, about the width of a single bacterium, while the silicon layer in common photodetectors is 100 micrometers, or more than 330 times as thick.
钙钛矿涂层的厚度大概有300纳米，大约相当于一个单细菌的宽度，而一般的光电探测器中硅胶层的厚度是100微米，或者说是钙钛矿涂层的330多倍。
In partially depleted SOI, the top layer is between 50- to 90-nm thick. Silicon under the channel is partially depleted of mobile charge.
在部分耗尽型SOI结构中，SOI中顶层硅层的厚度为50-90nm，因此沟道下方的硅层中仅有部分被耗尽层占据，由此可导致电荷在耗尽层以下的电中性区域中累积，造成所谓的浮体效应。
In standard silicon-based electronics, this involves the repeated application of resistive materials to protect those parts of the layer being etched that need to be preserved.
在基于硅分子水平的电子学中，就涉及到重复应用阻材料来保护被侵蚀的层中需要保护的那部分。
By contrast, IBM grew its graphene transistors on a silicon-carbide wafer, and then added an insulating layer which prevents short circuits in the transistors.
相比之下，IBM将石墨烯晶体管植入矽-碳晶圆上，然后涂上绝缘层以防止晶体管短路。
The results show that the damaged layer of silicon cut by WEDM mainly appears massive impurity elements, remelted and elastic distortion with a high density dislocation.
结果表明：电火花线切割单晶硅损伤层主要由杂质元素重污染层、重熔层和含有高密度位错的弹性畸变层组成；
Usually, the first layer is of silicon oxide, an insulator, which is etched to a desired thickness.
通常，第一层为氧化硅，绝缘体，其被蚀刻至所需的厚度。
The silicon oxide layer is formed by reacting a first gas mixture and a second gas mixture.
氧化硅层是由第一个反应气体混合物和第二气体混合物。
Porous silicon used as a sacrificial layer has some important applications in surface micromachining technology.
多孔硅作为一种牺牲层材料，在表面硅微机械加工技术中有着重要的应用。
For example, as shown in FIG. 8a, an oxide layer 810 optionally is patterned on a silicon substrate 820.
例如，如图8a所示，氧化层810选择性地在硅衬底820上形成图案。
At ordinary temperatures silicon is impervious to air, but at high temperatures it reacts with oxygen, forming a layer of silica that does not react further.
在常温下，硅不和空气反应，但是在高温下它和氧气反应，形成一层硅石，不再继续发生反应。
It shows severe hump without capping silicon nitride layer due to moisture diffusion during thermal anneal after inter layer oxide deposition by LPCVD.
它表明没有覆盖硅氮化层的严重驼峰取决于经过LPCVD的内部涂层氧化沉淀后化学处理期间的湿度扩散。
A method for forming a silicon oxide layer for use in integrated circuit fabrication is provided.
为形成了集成电路制造中使用的硅氧化层的方法提供。
Polymorphous silicon film was selected to be thermal-resistance layer of micro-bolometer, and we optimized the structure of micro-bolometer through optical and thermal design.
选定多形硅薄膜为微测辐射热计热敏层，并重点从光学和热学两方面对微测辐射热计结构进行了优化设计。
The invention discloses an etching stopping layer comprising a nitrogenous silicon carbide layer formed on a substrate and a silicon nitride layer formed on the silicon carbide layer.
本发明公开了一种刻蚀停止层，包括在衬底上形成的含氮的碳化硅 层，以及位于所述碳化硅层之上的氮化硅层。
The experiment proves the requirement of the device and the process in the quality and thickness of the silicon oxidation layer is well met.
实验证明，采用一步扩散法制备的氧化层的厚度和质量都很好的满足了机械刻槽埋栅电池的工艺要求；
The method is to coat a wafer of silicon with a protective layer of silicon dioxide.
其方法是往硅片上涂上一层二氧化硅防护膜。
And we predict that the variation of microstructure of AZO layer beneath silicon thin film will affect the microstructure of silicon thin film.
进一步推测，AZO薄膜微结构随退火的变化将导致硅薄膜微结构受到牵连影响。
And we predict that the variation of microstructure of AZO layer beneath silicon thin film will affect the microstructure of silicon thin film.
进一步推测，AZO薄膜微结构随退火的变化将导致硅薄膜微结构受到牵连影响。
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