Because of high resolution, high intergration, low cost and easy to use, Sigma-delta ADC has been used abroad in recently years.
模数转换器具有高分辨率、高集成度、成本低和使用方便的特点，近年来得到广泛的应用。
The digital decimation filter taking the important constituent in the Delta-Sigma Analog-to-Digital converter is realized by the multistage structure.
数字抽取滤波器是它的重要组成部分，通常采用多级结构来实现。
This invention discloses a Delta-Sigma Digital to Analog Converter (DAC), comprising a Delta-Sigma modulator and a Finite Impulse Response (FIR) filter.
本发明揭露一种三角积分数模转换器，其包含三角积分调制器以及有限脉 冲响应滤波器。
Delta sigma converters run at low rates - best is at 12 MHz - this means that there is a lot of noise that must be aggressively filtered out in the analogue section.
Delta sigma转换器的速率很低——最高也不过12MHz——这意味着许多噪音必须靠模拟环节的强力滤波来处理。
The Delta-Sigma modulator receives an over-sampled digital signal and generates a shaped digital signal.
三角积分调制器接收过采样数字信号并产生整形数字信号。
The Delta-Sigma modulator receives an over-sampled digital signal and generates a shaped digital signal.
三角积分调制器接收过采样数字信号并产生整形数字信号。
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