A high speed serial data receiver, which is applied in fiber-optic communications, is presented here.
文章设计了一种用于光纤通信的高速串行数据接收芯片。
The PC wireless serial interface circuit consists of single chip transmitter MICRF102, single chip receiver MICRF007 that are introduced in this paper.
介绍一种采用MICRF102单片发射器芯片、MICRF007单片接收器芯片构成的PC机无串行接口电路及程序设计。
Methods an ARM embedded system was used to achieve data transmission by implementing serial communication with GPS module, Beidou receiver and wireless digital broadcasting station.
方法：采用ARM嵌入式系统，并与G PS模块、北斗接收机和数传电台进行串口通信，实现数据的传输。
Because of the influence of noise and multiplex effect to signals in the transmitting process, serial interference appears in the receiver.
信号在传输过程中由于受噪音以及多径效应的影响，所以到接收端会因传输过程中的各种原因影响造成码间串扰。
The forth chapter introduces the mainboard's hardware design of tax controlled receiver. The mainboard contains common facility, such as CPU, LCD drive, FLASH, serial interface , and so on.
第四章详细介绍了税控收款机主板的硬件设计，主板包括CPU、LCD液晶驱动、FLASH、串口等常用的外设。
In the hardware field, CPLD is entitled for system logical control; Serial communication derived from UART (Universal Asynchronous Receiver Transmitter) frees the DSP of burdensome control.
在硬件上采用CPLD来完成系统的逻辑控制，利用UART(通用异步收发器)来进行串行通信，使DSP从繁忙的控制任务中解放出来。
In the hardware field, CPLD is entitled for system logical control; Serial communication derived from UART (Universal Asynchronous Receiver Transmitter) frees the DSP of burdensome control.
在硬件上采用CPLD来完成系统的逻辑控制，利用UART(通用异步收发器)来进行串行通信，使DSP从繁忙的控制任务中解放出来。
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