By using the serial data output, drivers can be cascaded for interface applications requiring additional drive lines.
通过使用串行数据输出，驱动器可级联需要附加驱动线路的接口应用。
When the devices are clocked, data is shifted toward the serial output QH.
当器件的时钟频率，数据是转向了串行输出齐晖。
The output data is accessed from the output register through a serial or parallel port. This offers easy, high speed interfacing to modern microcontrollers and digital signal processors.
输出数据通过串行或并行端口从输出寄存器中存取，这可实现与现代微控制器和数字信号处理器的轻松、高速接口。
The driving component includes: a N-bit serial buffer, a K-bit extension buffer, a N-bit video data buffer and N driving current output ports.
该驱动元件包括：一N个位的串序缓冲器，一K个位的延伸缓存器，一N个位的影像资料缓存器，N个驱动电流输出端口。
Writes data to the serial port output buffer.
将数据写入串行端口输出缓冲区。
The shift register's function is completion of parallel data input into serial data output. The design of shift register is an important part in the realization of CRC code.
在串行CRC编码实现中，移位寄存器主要完成将并行输人数据转换成串行输出数据的功能，是整个设计的重要组成部分。
This paper presented the design thoughts and character of digital control current regulators, using 8bit digital signal of DAC serial input data and about 2a supreme output current.
简述了以串行方式输入8位数字信号、最大可控电流为2A的数控恒流器件的设计思想和性能。
This paper presented the design thoughts and character of digital control current regulators, using 8bit digital signal of DAC serial input data and about 2a supreme output current.
简述了以串行方式输入8位数字信号、最大可控电流为2A的数控恒流器件的设计思想和性能。
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