• The first gate is separated from the second gate.

    第一栅极与第二栅极分离。

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  • The first gate and the second gate are separately disposed on the substrate.

    第一栅极及第二栅极分开配置于所述基底上。

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  • The transistor gate may be formed from first and second gate conductors with different work functions.

    晶体管栅极可以由具有不同功函数的第一栅极导体和第二栅极导体形成。

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  • Furthermore, the common doped region of the first gate and the second gate is disposed in the substrate.

    此外,第一栅极与第二栅极的共用掺杂区域配置于基底中。

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  • The relative sizes of the first and second gate conductors in a given transistor control the threshold voltage for the transistor.

    在给定晶体管中的第一栅极导体和第二栅极导体的相对尺寸控制晶体管的阈值电压。

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  • The resistive memory cell comprises a first gate, a second gate, a common doped region, a contact plug, a bit line and a resistive memory element.

    所述电阻式存储器单元包括第一栅极、第二栅极、共用掺杂区域、接触窗插塞、位线以及电阻式存储器元件。

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  • The depletion mode portion is gated by the second gate, and has been modified to operate in depletion mode and that is operative to shield the first gate from voltage stress.

    该耗尽模式部分由该第二栅极栅控,并且适于工作于耗尽模式且可屏蔽该第一栅极免受电压负荷影响。

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  • The first gate and the second gate are electrically connected, and the second gate is connected with a contact wire to be connected to a pad for transmitting a gate control signal.

    该第一栅极及第二栅极电性相连,且该第二栅极连接一接触线,以连接至一焊垫以传输栅极控制信号。

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  • The first gate and the second gate are electrically connected, and the second gate is connected with a contact wire to be connected to a pad for transmitting a gate control signal.

    该第一栅极及第二栅极电性相连,且该第二栅极连接一接触线,以连接至一焊垫以传输栅极控制信号。

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