Structure and work principle of SDRAM chip (MT48LC16M16A2TG-75IT) is analyzed. Internal architecture and workflow of SDRAM controller is confirmed. Furthermore, its control and data path is designed.
分析了SDRAM芯片(MT 48lc16 M 16a2tg- 75it)的结构和工作原理，确定了内存sdram控制器的内部结构和工作流程，完成了内存sdram控制器的控制通路和数据通路设计。
This article introduces that in a new design of radar raster-displaying terminal, SDRAM is used as video frame memory and FPGA is adopted to carry out the process of control circuit.
SDRAM作为雷达光栅显示视频帧缓冲存储器，通过FPGA器件实现对SDRAM的控制，已成功应用于一款雷达光栅显示终端。
The SDRAM has become the chief choice of the buffer storage because of its high speed, great capacity, and low price; but due to its complex control timing, it cannot directly interface with DSP.
同步动态随机存储器（SDRAM）具有高速，大容量，价格低廉等优点，因而成为缓冲存储器的首选，但是SDRAM控制时序比较复杂，不能与DSP直接接口，这极大地限制了它的广泛应用。
Based on the control block of LED display driving chip, the control codes in SDRAM are also given out in the appendix of the dissertaion.
基于LED大屏显示系统和驱动芯片，而设计了的控制模块，并在附录一给出了控制用SDRAM的代码实现方式。
For the problem of huge data storage, use SDRAM to store the data, and use FPGA to control SDRAM to complete the transpose.
为了解决数据量庞大、高速数据存取的问题，本文采用了FPGA芯片和同步动态存储器(SDRAM)来实现矩阵转置运算。
For the problem of huge data storage, use SDRAM to store the data, and use FPGA to control SDRAM to complete the transpose.
为了解决数据量庞大、高速数据存取的问题，本文采用了FPGA芯片和同步动态存储器(SDRAM)来实现矩阵转置运算。
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