Then, when the external reset signal is disabled, a delayed reset signal DLYRST is generated and applied to the DRAM controller so that it is reset.
然后，当使外部复位信号无效时，生成一个延迟的复位信号并将其加到DRAM控制器以将其复位。
Then, when the external reset signal is disabled, a delayed reset signal DLYRST is generated and applied to the DRAM controller so that it is reset.
然后，当使外部复位信号无效时，生成一个延迟的复位信号并将其加到DRAM控制器以将其复位。
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