Low cost test for integrated circuits or electrical modules using a reconfigurable logic device is described.
描述了使用可重新配置逻辑器件对集成电路或电模块的低成本测试。
Reconfigurable hardware unit is the kernel element of the reconfigurable computing system, which could be configured into diverse hardware logic to achieve multiple functions and applications.
可重构计算系统的核心是可重构硬件单元，可以通过配置成不同的硬件逻辑来实现多种功能和应用。
By producing evaluating completion signal early and using DSDCVS logic to design computation circuit of reconfigurable cell, a modified control circuit is proposed.
通过提前产生求值完成信号，使用DSDCVS逻辑实现可重构单元的运算电路，改进了异步可重构单元的控制电路。
Subsequently, the proposed method is applied to a case study on logic control for a reconfigurable assembly line.
随后，该方法适用于逻辑控制的个案研究可重构装配生产线。
In the ALU, we integrate the method of equinoctial node-group and conditional sum adder to design reconfigurable ALU, and join negative logic circuit design design principle into it.
在ALU设计中，将二分结组的思想和条件求和相结合设计了可重组的ALU，并加入负逻辑的数字电路设计思想。
In the ALU, we integrate the method of equinoctial node-group and conditional sum adder to design reconfigurable ALU, and join negative logic circuit design design principle into it.
在ALU设计中，将二分结组的思想和条件求和相结合设计了可重组的ALU，并加入负逻辑的数字电路设计思想。
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