Layer 3 processor system or interface buffers.
第三层处理器系统或接口缓冲区。
Researching the normal scheduling in 4-processor system.
研究了4一处理机系统中的规则调度。
This problem occurs only on a dual processor system with Windows NT 4.0.
这个问题在与视窗NT 4.0的一个双处理器系统发生。
The program also fails on a two-processor system. It prints the following.
该程序在双处理器系统中同样会失败。
The recommended value for a two-processor system with 1000 simultaneous sessions is 5.
对于有 1000个并发会话的双处理器系统，建议值为 5。
Moreover, the test hardware was not limited to an Intel-based single-processor system.
此外，测试硬件不局限于基于Intel 的单处理器系统。
This article gives a way to realize the In-Application Programming in universal micro-processor system.
文章介绍了如何在通用单片机系统上实现在线编程功能的方法。
If the problem does not happen on a single-processor system with JIT off, that might be an indication that JIT is not at fault.
如果这个问题不会在禁用jit的单处理器上发生，那么这就可能说明JIT不是问题的根源。
To improve schedule efficiency and performance of multi-core processor system, a new thread scheduling algorithm is presented.
为提高多核处理器系统的调度效率，充分发挥多核处理器的性能，提出了一种新的线程调度算法。
The long wave infrared image signal processor system is a special purpose multiprocessor system which has a typical MIMD structure.
长波红外图象信息处理机是一种专用多处理机，它具有典型的MIMD结构。
This capability gives a designer the option of running a real-time application on a dual processor system, increasing total processing power.
因而设计人员可以选择在双处理器系统上运行实时应用，提高整体的处理能力。
Using IDT70V24 as a example, the concrete apply of dual-port RAM in multi-processor system consisting of DSP and FPGA is explained in detail.
并以IDT70 V 24为例，详细说明了双口ram在由DSP处理器和FPGA构成的多机系统中的具体应用。
Low power technology is concerned increasingly by the researchers of architecture and compiler for next generation microarchitecture processor system.
低功耗技术越来越受到下一代微处理器系统和编译研究工作者的重视。
The power-optimized processor system bus remains powered down until it senses incoming data form the chipset, allowing to the processor to consume less power.
电源优化的处理器系统总线始终处于断电状态，直到感知来自芯片组的数据才通电，从而减少处理器的耗电量。
Contains topics that outline what to consider when you are building on a multi-processor system, for example, building in parallel and using memory efficiently.
包含概述在多处理器系统中生成时的注意事项的主题，例如并行生成以及有效使用内存。
The implementation of the parallel algorithm is discussed and results are given to show the performance of the parallel system compared to a single processor system.
文中还将多处理器并行系统与单个处理器系统的处理结果进行了对比分析，验证了并行算法的优越性。
A rotor flux oriented control scheme is implemented in a digital signal processor system to demonstrate the robustness of the speed estimation to parameter variations.
在数字信号处理器系统演示的速度估计的稳健性参数变化的转子磁场定向控制计划的实施。
Mapping the algorithms structure into the hardware of a real time processor system, the authors have designed and implemented the architecture of the SAR real time processing system.
提出并设计了基于此算法的多处理机并行工作的SAR处理机硬件体系结构。
In some embodiments a boot progress of a system boot Strap processor in a multi-processor system is monitored and a boot processor failure is detected using an Application processor.
在一些实施例中，使用应用处理器监视多处理器系统中系统自引导处理器的引导进度，并检测引导处理器故障。
The current algorithms of parallel association rules mining are analyzed, and the main factors affecting the performance of the mining algorithm in the multi-processor system are discussed.
文章在分析已有并行关联规则挖掘算法的基础上，讨论了多处理器系统中影响并行关联规则挖掘算法性能的主要问题。
If the problem does not happen at all on single-processor system even with JIT enabled, then it is likely to be a problem not related to JIT, but to time-dependent logic error in application.
如果这个问题即使在启用了JIT的单处理器系统上也不会出现，那么这个问题很可能与JIT无关，而是与应用程序中的时间相关逻辑有关。
This paper deals with a specific single processor system used in lighting control for sports tournament with its strong functions, easy operating, enable to construct different local net- works.
本文介绍了专门用于体育比赛灯光控制的专用单片微型计算机系统，这种系统功能强，操作方便，可形成各种局部网络。
Its modular architecture allows modules to be swapped in and out depending on the processor and operating system.
它的组件结构使得各组件可以依靠处理器和操作系统进行进出交换。
The path from the system processor/memory/OS/App to the HBA contains only the read data block.
在从系统处理器/内存/操作系统/应用程序到HBA 的路径上，只传输读取数据块。
The size of servers with respect to operating system, processor, memory, data storage, and so on dictates the true maximum size.
服务器的大小与操作系统、处理器、内存和数据存储等有关，这些因素决定实际的大小。
Ensure that the system processor type and modes on both the CECs are compatible.
确保两个cec上的系统处理器类型和型号是兼容的。
Ensuring the target system has sufficient memory and processor resources to meet the LPAR's current entitlements.
确认目标系统有足够的内存和处理器资源，可以满足LPAR当前的需求。
The system may include a processor, a memory, and an interface.
该系统将包含一个处理器、一个存储器和一个操作界面。
The total number of partitions that can be created depends on the system processor model and resources available.
可以创建的分区的总数依赖于系统处理器模型和可用的资源。
The command takes three options: the operating system name, the processor architecture, and the profile.
此命令接受三个选项：操作系统名、处理器架构和概要文件。
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