Branch mis-prediction (Processor guesses the wrong branch, so it has to flush the pipeline and load instruction from proper branch again), or.
分支预测错误(处理器猜错了分支，所以它不得不更新流水线并从正确的分支装载指令)。
The identical pipeline structure lets compiler optimizations targeted for POWER4 to work equally well on POWER5 processor-based systems.
相同的管道结构使得为POWER4 所生成的处理器代码可以同样好地应用于基于 POWER5 处理器的系统。
Compared with the full parallel architecture, the memory cost of the designed processor decreases, thus the speed is higher than that of the SDF pipeline architecture.
该处理器内存资源消耗较并行结构有所减少，运算速度较单独的SDF流水线结构有所提高。
The design of branch prediction is mainly studied and the integer pipeline of processor based on EPIC architecture is designed and realized in this paper.
本文的重点是研究基于EPIC体系结构处理器指令分支预测和整数流水线的设计与实现。
It's much easier to implement the scalable FFT processor based on multilevel pipeline processing architecture.
特别是流水线结构使得FFT处理器可以通过对模块级数的控制，很容易的实现不同点数的FFT计算。
Based on pipeline and parallelism technology, the processor can run in real-time.
基于流水线技术和并行技术的硬件设计保证了该算法的实时实现。
The application of the pipeline technology essentially enhances the micro-processor's performance and the pipeline technology has become one basic feature of modem micro-processor.
流水线技术的应用从本质上提高了微处理器的性能，成为现代微处理器的基本特征。
The application of the pipeline technology essentially enhances the micro-processor's performance and the pipeline technology has become one basic feature of modem micro-processor.
流水线技术的应用从本质上提高了微处理器的性能，成为现代微处理器的基本特征。
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