• In addition to processor clock speed, another important processor performance metric is clock cycles per instruction (CPI).

    除了处理器时钟速度外,另一个重要的处理器性能度量是每条指令的时钟周期(CPI)。

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  • "It seems they felt that giving up a little bit of processor performance for a lot of graphics performance was a reasonable tradeoff," says Nathan Brookwood, principal analyst at Insight 64.

    “他们似乎认为,牺牲一丁点处理器性能,换得图像性能的较大提升是一个合理的折中。”Insight 64公司的首席分析师内森·布鲁克伍德(Nathan Brook wood)表示。

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  • Strained silicon is a fundamental component of all recent microprocessors. The reason for its success is that local strain-induced deformation in the crystal lattice improves processor performance.

    “变形”硅是所有最新的处理器的基本组成部分,原因是:晶格里应变诱发的形变提升了处理器的性能。

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  • Even though I'm not very knowledgeable about hardware, the course was a great introduction to the issues that hardware designers must take into account when they want to improve processor performance.

    即使我不是非常了解硬件,但是该课程很好地介绍了当硬件设计人员想要提高处理器性能时必须考虑的问题。

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  • It is a library that helps you leverage multi-core processor performance without having to be a threading expert.

    这种库可以帮助您充分利用多核处理器的性能,而无需掌握大量线程方面的专业知识。

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  • And this has practical significance for superscalar processor performance modeling and research.

    对超标量处理器的性能模拟和研究有着实际的意义。

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  • Of course one of the driving factors of this business is the exponential increase in processor performance.

    当然,处理器性能的巨大提高是这一商务领域的一个推动因素。

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  • In audio applications, the single-instruction, multiple data (SIMD) mode effectively doubles the processor performance.

    在音频应用中,单指令多数据(SIMD)模式实际上可使处理器性能提高一倍。

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  • The combination of DSP processors and reconfigurable computing technology has the promising potential to improve the single DSP processor performance to a higher level.

    而可重构技术和DSP处理器的结合也使得单DSP处理器性能有望得到很大提升。

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  • This paper presents a simulation of the packet processing procedure using real traffic traces to analyze the impact of the caching mechanism on the network processor performance.

    该文截取实际网络链路上的流量,对数据包处理过程进行模拟,并分析cache机制对网络处理器的各性能参数的影响。

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  • This paper presents a simulation of the packet processing procedure using real traffic traces to analyze the impact of the caching mechanism on the network processor performance.

    该文截取实际网络链路上的流量,对数据包处理过程进行模拟,并分析cache机制对网络处理器的各性能参数的影响。

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