Since the combination of processor, connection and memory is a machine, the model can be used to describe recursive processes.
鉴于处理器、连接器和内存的组合就是一台机器，因此这个模型能够用于描述递归流程。
The model I propose consists of four components: a memory, a processor, a connection between the memory and the processor, and an actuator.
我提议的这个模型包含四个组件：内存、处理器、二者间的连接以及执行器。
Inter processor communications or messages portion is allocated during IDS initialization if you configure at least one of your connections as an IPC shared-memory connection.
如果您至少将一个连接配置为IPC共享内存连接，那么在初始化ids时将分配处理器间的通信或消息区。
On the framework, it develops a universal instruction simulator core and system inter-connection model, processor model, memory model, device model and debug model.
实现了基于虚拟指令集的通用处理器内核，同时实现了通用的系统互联模型，处理器模型，存储器模型、外围设备模型和调试模型。
On the framework, it develops a universal instruction simulator core and system inter-connection model, processor model, memory model, device model and debug model.
实现了基于虚拟指令集的通用处理器内核，同时实现了通用的系统互联模型，处理器模型，存储器模型、外围设备模型和调试模型。
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