Power gating is a powerful and applicable solution to reduce both dynamic power and static power.
电源门控法可以同时有效地降低动态功耗和静态功耗，是一项具有广阔应用前景的技术。
There's of course extensive clock gating around the chip, but obviously the big change is power gating which AMD hasn't had up to this point (Bobcat is also power gated).
当然，频率和功耗控制是对整个芯片都起作用的，但是显然，AMD有了巨大的改进，功率门限可是以前做不到的(山猫也实现了功率门限)。
In order to reduce the power in the clock tree, a new gating circuit is presented.
为了能够减少时脉系统的功率消耗，一种新型的闸电路被提出。
SMU module adopts the clock-gating method was applied to the survivor path storage block, reduce the survivor path storage memory power dissipation effectively.
在幸存路径管理模块采用门控时钟的方法，有效地降低了对幸存路径存储部分的功耗。
For RISC processer, clock-gating can reduce power by 18.8%.
对于risc微处理器，门控时钟技术可以降低功耗18.8%。
For RISC processer, clock-gating can reduce power by 18.8%.
对于risc微处理器，门控时钟技术可以降低功耗18.8%。
应用推荐