The nonlinear characteristics of PLL system are analyzed comprehensively in this thesis for the first time.
首次对电机锁相控制系统的非线性问题进行了较全面的研究工作。
The PLL system could obtain basic component of the input, track the instantaneous phase of basic component, and output instantaneous Angle frequency.
该方法通过一个改进锁相环系统实时跟踪输入信号的基波瞬时相位，输出基波瞬时角频率，进而得到输入信号的基本频率估计。
In this paper the principle and design of a microcomputer-controlled PLL frequency synthesis digit tuning system is discussed.
本文叙述了一个用微机控制的锁相环频率合成数字调谐系统的原理和设计。
A phase selection PLL is adopted to adjust the phase of the recovered clock, and the chip area of the recovery circuit is greatly reduced without sacrificing the noise performance of the system.
设计了一个数字时钟数据恢复电路，采用相位选择锁相环进行相位调整，在不影响系统噪声性能的前提下大大降低了芯片面积。
A new method which employs PLL to design vehicle detectors is presented in this paper. The designing of deferent parts of the detecting system is discussed and analyzed.
给出了一种利用锁相环构造车辆检测系统的方法，并就该系统各部分的设计进行了分析和讨论。
Two kinds of cause of losing lock in PLL speed regulation system are analysed. Corresponding formulas are obtained. The ways of overcoming losing lock are put for ward.
本文分析了锁相环调速系统中两种失锁现象的原因，得出相应的计算公式，提出了克服失锁的办法。
In the ultra high frequency system, the frequency compounder section of the transmitting frequency is operated with DDS/PLL technology.
在甚高频系统中，射频的的频率合成器部分采用DDS/PLL技术。
The technology of PLL has always been the research emphasis in the field of measurement and control of power system.
锁相同步技术一直都是电力系统测控领域的研究重点。
Frequency synthesizer composed of PLL is widely used in radar system because of PLL specialties such as narrow band, signal tracking and filter.
由于锁相环电路具有的窄带、跟踪、滤波等优点，因此在现有的雷达系统中，普遍采用由锁相环构成的频率综合器。
Based on a new digital PLL, a new current tracing control strategy for a grid-connected PV system was proposed to control the amplitude and phase of the inverter current.
针对光伏并网发电系统，基于数字锁相环，研究了一种实现系统并网电流幅值、相位跟踪控制的新方法。
One important application of PLL in microprocessor is to provide on-chip clock for the system. It has been a core module of microprocessor.
锁相环在微处理器领域中的一个重要应用就是为系统提供片内时钟，它是微处理器时钟电路中的核心模块。
The stability of the system is analyzed by small-signal, the results shows that the double integrator close-loop is a Phase-Locked-Loop (PLL) essentially.
采用小信号的方法对其稳定性进行分析。分析结果表明这种结构本质上具有锁相环的功能。
The phase locked loop (PLL) frequency synthesizer for digital tuning system(DTS), which is used in DTS of car radio receiver, is presented.
针对一个汽车音响收音数字调谐系统的实例，介绍了一种广播用双波段锁相环频率合成芯片的设计方法。
The results indicate that the PLL source has low phase noise and stray, and it can meet the requirement of design and system operation.
测试结果显示，该频率源相位噪声较低、杂散低，满足设计和系统使用要求。
U-7000 is a PLL Synthesized dual channel UHF wireless microphone system with 16 user selectable channels.
是一个相位锁定频率合成UHF双频道的无线话筒接收系统，具备16 个预设的互不干扰频道供选择。
This system works on UHF frequency brand, use PLL circuit. There are 256 frequencies for your option.
本机工作在UHF频率，采用PLL锁相环电路，预设256个可选择使用频率。
At the last of the paper, the optimized method of the PLL signal real-time processing in the Tracking, Telemetering and Control System is presented.
最后提出软件锁相环在测控系统中实现信号实时处理的优化方法。
At the last of the paper, the optimized method of the PLL signal real-time processing in the Tracking, Telemetering and Control System is presented.
最后提出软件锁相环在测控系统中实现信号实时处理的优化方法。
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