Graph Process Unit (GPU) usually adopts a pipelined architecture, and implements some general computer graphics API.
图形处理器(GPU)通常采用流水线体系结构，遵循通用图形接口规范。
The dual ADC core features a multistage, differential pipelined architecture with integrated output error correction logic.
这款双通道adc内核采用多级、差分流水线架构，并集成了输出纠错逻辑。
Based on the analysis of the complexity and hardware architecture of FFT, the proposed processor adopts radix-4 DIF algorithm, pipelined architecture and fixed-point operation.
在分析了FFT算法的复杂度和硬件实现结构的基础上，处理器采用了按频率抽取的基- 4算法，分级流水线以及定点运算结构。
The Pipelined ADC architecture has the characteristics of high sampling rate as well as high resolution.
流水线结构ADC具有能同时实现高采样速率和高分辨率的特点。
The Pipelined ADC architecture has the characteristics of high sampling rate as well as high resolution.
流水线结构ADC具有能同时实现高采样速率和高分辨率的特点。
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